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git01.mediatek.com / filogic / uboot / 6bb92fcf7d2fea2314d616e5e2391a8bf2b0fdfa / . / src / arm / aspeed / aspeed-bmc-facebook-tiogapass.dts
blob: 704ee684e0fb408b8dfc5d79cb8db70110272923 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2018 Facebook Inc.
3// Author: Vijay Khemka <vijaykhemka@fb.com>
4/dts-v1/;
5
6#include "aspeed-g5.dtsi"
7#include <dt-bindings/gpio/aspeed-gpio.h>
8#include <dt-bindings/i2c/i2c.h>
9
10/ {
11 model = "Facebook TiogaPass BMC";
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
13 aliases {
14 serial0 = &uart1;
15 serial4 = &uart5;
16
17 /*
18 * Hardcode the bus number of i2c switches' channels to
19 * avoid breaking the legacy applications.
20 */
21 i2c16 = &imux16;
22 i2c17 = &imux17;
23 i2c18 = &imux18;
24 i2c19 = &imux19;
25 i2c20 = &imux20;
26 i2c21 = &imux21;
27 i2c22 = &imux22;
28 i2c23 = &imux23;
29 i2c24 = &imux24;
30 i2c25 = &imux25;
31 i2c26 = &imux26;
32 i2c27 = &imux27;
33 i2c28 = &imux28;
34 i2c29 = &imux29;
35 i2c30 = &imux30;
36 i2c31 = &imux31;
37 };
38 chosen {
39 stdout-path = &uart5;
40 bootargs = "console=ttyS4,115200 earlycon";
41 };
42
43 memory@80000000 {
44 reg = <0x80000000 0x20000000>;
45 };
46
47 iio-hwmon {
48 compatible = "iio-hwmon";
49 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
50 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
51 };
52
53};
54
55&fmc {
56 status = "okay";
57 flash@0 {
58 status = "okay";
59 m25p,fast-read;
60#include "openbmc-flash-layout.dtsi"
61 };
62};
63
64&spi1 {
65 status = "okay";
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_spi1_default>;
68 flash@0 {
69 status = "okay";
70 m25p,fast-read;
71 label = "pnor";
72 };
73};
74
75&lpc_snoop {
76 status = "okay";
77 snoop-ports = <0x80>;
78};
79
80&lpc_ctrl {
81 // Enable lpc clock
82 status = "okay";
83};
84
85&uart1 {
86 // Host Console
87 status = "okay";
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_txd1_default
90 &pinctrl_rxd1_default>;
91};
92
93&uart2 {
94 // SoL Host Console
95 status = "okay";
96};
97
98&uart3 {
99 // SoL BMC Console
100 status = "okay";
101};
102
103&uart5 {
104 // BMC Console
105 status = "okay";
106};
107
108&kcs2 {
109 // BMC KCS channel 2
110 status = "okay";
111 aspeed,lpc-io-reg = <0xca8>;
112};
113
114&kcs3 {
115 // BMC KCS channel 3
116 status = "okay";
117 aspeed,lpc-io-reg = <0xca2>;
118};
119
120&gpio {
121 status = "okay";
122 gpio-line-names =
123 /*A0-A7*/ "BMC_CPLD_FPGA_SEL","","","","","","","",
124 /*B0-B7*/ "","BMC_DEBUG_EN","","","","BMC_PPIN","PS_PWROK",
125 "IRQ_PVDDQ_GHJ_VRHOT_LVT3",
126 /*C0-C7*/ "","","","","","","","",
127 /*D0-D7*/ "BIOS_MRC_DEBUG_MSG_DIS","BOARD_REV_ID0","",
128 "BOARD_REV_ID1","IRQ_DIMM_SAVE_LVT3","BOARD_REV_ID2",
129 "CPU_ERR0_LVT3_BMC","CPU_ERR1_LVT3_BMC",
130 /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON",
131 "POWER_OUT","NMI_BUTTON","","CPU0_PROCHOT_LVT3_ BMC",
132 "CPU1_PROCHOT_LVT3_ BMC",
133 /*F0-F7*/ "IRQ_PVDDQ_ABC_VRHOT_LVT3","",
134 "IRQ_PVCCIN_CPU0_VRHOT_LVC3",
135 "IRQ_PVCCIN_CPU1_VRHOT_LVC3",
136 "IRQ_PVDDQ_KLM_VRHOT_LVT3","","P3VBAT_BRIDGE_EN","",
137 /*G0-G7*/ "CPU_ERR2_LVT3","CPU_CATERR_LVT3","PCH_BMC_THERMTRIP",
138 "CPU0_SKTOCC_LVT3","","","","BIOS_SMI_ACTIVE",
139 /*H0-H7*/ "LED_POST_CODE_0","LED_POST_CODE_1","LED_POST_CODE_2",
140 "LED_POST_CODE_3","LED_POST_CODE_4","LED_POST_CODE_5",
141 "LED_POST_CODE_6","LED_POST_CODE_7",
142 /*I0-I7*/ "CPU0_FIVR_FAULT_LVT3","CPU1_FIVR_FAULT_LVT3",
143 "FORCE_ADR","UV_ADR_TRIGGER_EN","","","","",
144 /*J0-J7*/ "","","","","","","","",
145 /*K0-K7*/ "","","","","","","","",
146 /*L0-L7*/ "IRQ_UV_DETECT","IRQ_OC_DETECT","HSC_TIMER_EXP","",
147 "MEM_THERM_EVENT_PCH","PMBUS_ALERT_BUF_EN","","",
148 /*M0-M7*/ "CPU0_RC_ERROR","CPU1_RC_ERROR","","OC_DETECT_EN",
149 "CPU0_THERMTRIP_LATCH_LVT3",
150 "CPU1_THERMTRIP_LATCH_LVT3","","",
151 /*N0-N7*/ "","","","CPU_MSMI_LVT3","","BIOS_SPI_BMC_CTRL","","",
152 /*O0-O7*/ "","","","","","","","",
153 /*P0-P7*/ "BOARD_SKU_ID0","BOARD_SKU_ID1","BOARD_SKU_ID2",
154 "BOARD_SKU_ID3","BOARD_SKU_ID4","BMC_PREQ",
155 "BMC_PWR_DEBUG","RST_RSMRST",
156 /*Q0-Q7*/ "","","","","UARTSW_LSB","UARTSW_MSB",
157 "POST_CARD_PRES_BMC","PE_BMC_WAKE",
158 /*R0-R7*/ "","","BMC_TCK_MUX_SEL","BMC_PRDY",
159 "BMC_XDP_PRSNT_IN","RST_BMC_PLTRST_BUF","SLT_CFG0",
160 "SLT_CFG1",
161 /*S0-S7*/ "THROTTLE","BMC_READY","","HSC_SMBUS_SWITCH_EN","",
162 "","","",
163 /*T0-T7*/ "","","","","","","","",
164 /*U0-U7*/ "","","","","","BMC_FAULT","","",
165 /*V0-V7*/ "","","","FAST_PROCHOT_EN","","","","",
166 /*W0-W7*/ "","","","","","","","",
167 /*X0-X7*/ "","","","GLOBAL_RST_WARN",
168 "CPU0_MEMABC_MEMHOT_LVT3_BMC",
169 "CPU0_MEMDEF_MEMHOT_LVT3_BMC",
170 "CPU1_MEMGHJ_MEMHOT_LVT3_BMC",
171 "CPU1_MEMKLM_MEMHOT_LVT3_BMC",
172 /*Y0-Y7*/ "SIO_S3","SIO_S5","BMC_JTAG_SEL","SIO_ONCONTROL","",
173 "","","",
174 /*Z0-Z7*/ "","SIO_POWER_GOOD","IRQ_PVDDQ_DEF_VRHOT_LVT3","",
175 "","","","",
176 /*AA0-AA7*/ "CPU1_SKTOCC_LVT3","IRQ_SML1_PMBUS_ALERT",
177 "SERVER_POWER_LED","","PECI_MUX_SELECT","UV_HIGH_SET",
178 "","POST_COMPLETE",
179 /*AB0-AB7*/ "IRQ_HSC_FAULT","OCP_MEZZA_PRES","","","","","","",
180 /*AC0-AC7*/ "","","","","","","","";
181};
182
183&mac0 {
184 status = "okay";
185
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_rmii1_default>;
188 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
189 <&syscon ASPEED_CLK_MAC1RCLK>;
190 clock-names = "MACCLK", "RCLK";
191 use-ncsi;
192};
193
194&mac1 {
195 status = "okay";
196
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_rmii2_default>;
199 use-ncsi;
200};
201
202&adc {
203 status = "okay";
204};
205
206&i2c0 {
207 status = "okay";
208 //Airmax Conn B, CPU0 PIROM, CPU1 PIROM
209};
210
211&i2c1 {
212 status = "okay";
213 //X24 Riser
214 i2c-mux@71 {
215 compatible = "nxp,pca9544";
216 #address-cells = <1>;
217 #size-cells = <0>;
218 reg = <0x71>;
219
220 imux16: i2c@0 {
221 #address-cells = <1>;
222 #size-cells = <0>;
223 reg = <0>;
224
225 ina230@45 {
226 compatible = "ti,ina230";
227 reg = <0x45>;
228 };
229
230 tmp75@48 {
231 compatible = "ti,tmp75";
232 reg = <0x48>;
233 };
234
235 tmp421@49 {
236 compatible = "ti,tmp75";
237 reg = <0x49>;
238 };
239
240 eeprom@50 {
241 compatible = "atmel,24c64";
242 reg = <0x50>;
243 pagesize = <32>;
244 };
245
246 i2c-mux@73 {
247 compatible = "nxp,pca9546";
248 #address-cells = <1>;
249 #size-cells = <0>;
250 reg = <0x73>;
251
252 imux20: i2c@0 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 reg = <0>;
256 };
257
258 imux21: i2c@1 {
259 #address-cells = <1>;
260 #size-cells = <0>;
261 reg = <1>;
262 };
263
264 imux22: i2c@2 {
265 #address-cells = <1>;
266 #size-cells = <0>;
267 reg = <2>;
268 };
269
270 imux23: i2c@3 {
271 #address-cells = <1>;
272 #size-cells = <0>;
273 reg = <3>;
274 };
275
276 };
277
278 };
279
280 imux17: i2c@1 {
281 #address-cells = <1>;
282 #size-cells = <0>;
283 reg = <1>;
284
285 ina230@45 {
286 compatible = "ti,ina230";
287 reg = <0x45>;
288 };
289
290 tmp421@48 {
291 compatible = "ti,tmp75";
292 reg = <0x48>;
293 };
294
295 tmp421@49 {
296 compatible = "ti,tmp75";
297 reg = <0x49>;
298 };
299
300 eeprom@50 {
301 compatible = "atmel,24c64";
302 reg = <0x50>;
303 pagesize = <32>;
304 };
305
306 i2c-mux@73 {
307 compatible = "nxp,pca9546";
308 #address-cells = <1>;
309 #size-cells = <0>;
310 reg = <0x73>;
311
312 imux24: i2c@0 {
313 #address-cells = <1>;
314 #size-cells = <0>;
315 reg = <0>;
316 };
317
318 imux25: i2c@1 {
319 #address-cells = <1>;
320 #size-cells = <0>;
321 reg = <1>;
322 };
323
324 imux26: i2c@2 {
325 #address-cells = <1>;
326 #size-cells = <0>;
327 reg = <2>;
328 };
329
330 imux27: i2c@3 {
331 #address-cells = <1>;
332 #size-cells = <0>;
333 reg = <3>;
334 };
335
336 };
337
338 };
339
340 imux18: i2c@2 {
341 #address-cells = <1>;
342 #size-cells = <0>;
343 reg = <2>;
344
345 ina230@45 {
346 compatible = "ti,ina230";
347 reg = <0x45>;
348 };
349
350 tmp421@48 {
351 compatible = "ti,tmp75";
352 reg = <0x48>;
353 };
354
355 tmp421@49 {
356 compatible = "ti,tmp75";
357 reg = <0x49>;
358 };
359
360 eeprom@50 {
361 compatible = "atmel,24c64";
362 reg = <0x50>;
363 pagesize = <32>;
364 };
365
366 i2c-mux@73 {
367 compatible = "nxp,pca9546";
368 #address-cells = <1>;
369 #size-cells = <0>;
370 reg = <0x73>;
371
372 imux28: i2c@0 {
373 #address-cells = <1>;
374 #size-cells = <0>;
375 reg = <0>;
376 };
377
378 imux29: i2c@1 {
379 #address-cells = <1>;
380 #size-cells = <0>;
381 reg = <1>;
382 };
383
384 imux30: i2c@2 {
385 #address-cells = <1>;
386 #size-cells = <0>;
387 reg = <2>;
388 };
389
390 imux31: i2c@3 {
391 #address-cells = <1>;
392 #size-cells = <0>;
393 reg = <3>;
394 };
395
396 };
397
398 };
399
400 imux19: i2c@3 {
401 #address-cells = <1>;
402 #size-cells = <0>;
403 reg = <3>;
404
405 i2c-switch@40 {
406 compatible = "ti,ina230";
407 reg = <0x40>;
408 };
409
410 i2c-switch@41 {
411 compatible = "ti,ina230";
412 reg = <0x41>;
413 };
414
415 i2c-switch@45 {
416 compatible = "ti,ina230";
417 reg = <0x45>;
418 };
419
420 };
421
422 };
423};
424
425&i2c2 {
426 status = "okay";
427 // Mezz Management SMBus
428};
429
430&i2c3 {
431 status = "okay";
432 // SMBus to Board ID EEPROM
433};
434
435&i2c4 {
436 status = "okay";
437 // BMC Debug Header
438 ipmb0@10 {
439 compatible = "ipmb-dev";
440 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
441 i2c-protocol;
442 };
443};
444
445&i2c5 {
446 status = "okay";
447 // CPU Voltage regulators
448 regulator@48 {
449 compatible = "infineon,pxe1610";
450 reg = <0x48>;
451 };
452 regulator@4a {
453 compatible = "infineon,pxe1610";
454 reg = <0x4a>;
455 };
456 regulator@50 {
457 compatible = "infineon,pxe1610";
458 reg = <0x50>;
459 };
460 regulator@52 {
461 compatible = "infineon,pxe1610";
462 reg = <0x52>;
463 };
464 regulator@58 {
465 compatible = "infineon,pxe1610";
466 reg = <0x58>;
467 };
468 regulator@5a {
469 compatible = "infineon,pxe1610";
470 reg = <0x5a>;
471 };
472 regulator@68 {
473 compatible = "infineon,pxe1610";
474 reg = <0x68>;
475 };
476 regulator@70 {
477 compatible = "infineon,pxe1610";
478 reg = <0x70>;
479 };
480 regulator@72 {
481 compatible = "infineon,pxe1610";
482 reg = <0x72>;
483 };
484};
485
486&i2c6 {
487 status = "okay";
488 tpm@20 {
489 compatible = "infineon,slb9645tt";
490 reg = <0x20>;
491 };
492 tmp421@4e {
493 compatible = "ti,tmp421";
494 reg = <0x4e>;
495 };
496 tmp421@4f {
497 compatible = "ti,tmp421";
498 reg = <0x4f>;
499 };
500 eeprom@54 {
501 compatible = "atmel,24c64";
502 reg = <0x54>;
503 pagesize = <32>;
504 };
505};
506
507&i2c7 {
508 status = "okay";
509 //HSC, AirMax Conn A
510 adm1278@45 {
511 compatible = "adm1275";
512 reg = <0x45>;
513 shunt-resistor-micro-ohms = <250>;
514 };
515};
516
517&i2c8 {
518 status = "okay";
519 tmp421@1f {
520 compatible = "ti,tmp421";
521 reg = <0x1f>;
522 };
523 //Mezz Sensor SMBus
524};
525
526&i2c9 {
527 status = "okay";
528 //USB Debug Connector
529 ipmb0@10 {
530 compatible = "ipmb-dev";
531 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
532 i2c-protocol;
533 };
534};
535
536&pwm_tacho {
537 status = "okay";
538 pinctrl-names = "default";
539 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
540 fan@0 {
541 reg = <0x00>;
542 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
543 };
544
545 fan@1 {
546 reg = <0x01>;
547 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
548 };
549};