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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier AHCI PHY
8
9description: |
10 This describes the deivcetree bindings for PHY interfaces built into
11 AHCI controller implemented on Socionext UniPhier SoCs.
12
13maintainers:
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
15
16properties:
17 compatible:
18 enum:
19 - socionext,uniphier-pro4-ahci-phy
20 - socionext,uniphier-pxs2-ahci-phy
21 - socionext,uniphier-pxs3-ahci-phy
22
23 reg:
24 maxItems: 1
25
26 "#phy-cells":
27 const: 0
28
29 clocks:
30 minItems: 1
31 maxItems: 2
32
33 clock-names: true
34
35 resets:
36 minItems: 2
37 maxItems: 6
38
39 reset-names: true
40
41allOf:
42 - if:
43 properties:
44 compatible:
45 contains:
46 const: socionext,uniphier-pro4-ahci-phy
47 then:
48 properties:
49 clocks:
50 minItems: 2
51 maxItems: 2
52 clock-names:
53 items:
54 - const: link
55 - const: gio
56 resets:
57 minItems: 6
58 maxItems: 6
59 reset-names:
60 items:
61 - const: link
62 - const: gio
63 - const: phy
64 - const: pm
65 - const: tx
66 - const: rx
67 - if:
68 properties:
69 compatible:
70 contains:
71 const: socionext,uniphier-pxs2-ahci-phy
72 then:
73 properties:
74 clocks:
75 maxItems: 1
76 clock-names:
77 const: link
78 resets:
79 minItems: 2
80 maxItems: 2
81 reset-names:
82 items:
83 - const: link
84 - const: phy
85 - if:
86 properties:
87 compatible:
88 contains:
89 const: socionext,uniphier-pxs3-ahci-phy
90 then:
91 properties:
92 clocks:
93 minItems: 2
94 maxItems: 2
95 clock-names:
96 items:
97 - const: link
98 - const: phy
99 resets:
100 minItems: 2
101 maxItems: 2
102 reset-names:
103 items:
104 - const: link
105 - const: phy
106
107required:
108 - compatible
109 - reg
110 - "#phy-cells"
111 - clocks
112 - clock-names
113 - resets
114 - reset-names
115
116additionalProperties: false
117
118examples:
119 - |
120 ahci_phy: phy@10 {
121 compatible = "socionext,uniphier-pxs3-ahci-phy";
122 reg = <0x10 0x10>;
123 #phy-cells = <0>;
124 clock-names = "link", "phy";
125 clocks = <&sys_clk 28>, <&sys_clk 30>;
126 reset-names = "link", "phy";
127 resets = <&sys_rst 28>, <&sys_rst 30>;
128 };