blob: f82649a55e91b97533570f4bc13007ead2e8c84b [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car generation 3 USB 2.0 PHY
8
9maintainers:
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12properties:
13 compatible:
14 oneOf:
15 - items:
16 - const: renesas,usb2-phy-r8a77470 # RZ/G1C
17
18 - items:
19 - enum:
20 - renesas,usb2-phy-r7s9210 # RZ/A2
21 - renesas,usb2-phy-r8a774a1 # RZ/G2M
22 - renesas,usb2-phy-r8a774b1 # RZ/G2N
23 - renesas,usb2-phy-r8a774c0 # RZ/G2E
24 - renesas,usb2-phy-r8a774e1 # RZ/G2H
25 - renesas,usb2-phy-r8a7795 # R-Car H3
26 - renesas,usb2-phy-r8a7796 # R-Car M3-W
27 - renesas,usb2-phy-r8a77961 # R-Car M3-W+
28 - renesas,usb2-phy-r8a77965 # R-Car M3-N
29 - renesas,usb2-phy-r8a77990 # R-Car E3
30 - renesas,usb2-phy-r8a77995 # R-Car D3
31 - const: renesas,rcar-gen3-usb2-phy
32
33 - items:
34 - enum:
35 - renesas,usb2-phy-r9a07g043 # RZ/G2UL
36 - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
37 - renesas,usb2-phy-r9a07g054 # RZ/V2L
38 - const: renesas,rzg2l-usb2-phy
39
40 reg:
41 maxItems: 1
42
43 clocks:
44 minItems: 1
45 maxItems: 2
46
47 clock-names:
48 minItems: 1
49 items:
50 - const: fck
51 - const: usb_x1
52
53 '#phy-cells':
54 enum: [0, 1] # and 0 is deprecated.
55 description: |
56 The phandle's argument in the PHY specifier is the INT_STATUS bit of
57 controller.
58 - 1 = USBH_INTA (OHCI)
59 - 2 = USBH_INTB (EHCI)
60 - 3 = UCOM_INT (OTG and BC)
61
62 interrupts:
63 maxItems: 1
64
65 power-domains:
66 maxItems: 1
67
68 resets:
69 minItems: 1
70 items:
71 - description: reset of USB 2.0 host side
72 - description: reset of USB 2.0 peripheral side
73
74 vbus-supply:
75 description: |
76 Phandle to a regulator that provides power to the VBUS. This regulator
77 will be managed during the PHY power on/off sequence.
78
79 renesas,no-otg-pins:
80 $ref: /schemas/types.yaml#/definitions/flag
81 description: |
82 specify when a board does not provide proper otg pins.
83
84 dr_mode: true
85
86if:
87 properties:
88 compatible:
89 contains:
90 const: renesas,usb2-phy-r7s9210
91then:
92 required:
93 - clock-names
94
95required:
96 - compatible
97 - reg
98 - clocks
99 - '#phy-cells'
100
101allOf:
102 - if:
103 properties:
104 compatible:
105 contains:
106 const: renesas,rzg2l-usb2-phy
107 then:
108 required:
109 - resets
110
111additionalProperties: false
112
113examples:
114 - |
115 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
116 #include <dt-bindings/interrupt-controller/arm-gic.h>
117 #include <dt-bindings/power/r8a7795-sysc.h>
118
119 usb-phy@ee080200 {
120 compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
121 reg = <0xee080200 0x700>;
122 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
123 clocks = <&cpg CPG_MOD 703>;
124 #phy-cells = <1>;
125 };
126
127 usb-phy@ee0a0200 {
128 compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
129 reg = <0xee0a0200 0x700>;
130 clocks = <&cpg CPG_MOD 702>;
131 #phy-cells = <1>;
132 };