| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Renesas R-Car Gen2 USB PHY |
| 8 | |
| 9 | maintainers: |
| 10 | - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | items: |
| 15 | - enum: |
| 16 | - renesas,usb-phy-r8a7742 # RZ/G1H |
| 17 | - renesas,usb-phy-r8a7743 # RZ/G1M |
| 18 | - renesas,usb-phy-r8a7744 # RZ/G1N |
| 19 | - renesas,usb-phy-r8a7745 # RZ/G1E |
| 20 | - renesas,usb-phy-r8a77470 # RZ/G1C |
| 21 | - renesas,usb-phy-r8a7790 # R-Car H2 |
| 22 | - renesas,usb-phy-r8a7791 # R-Car M2-W |
| 23 | - renesas,usb-phy-r8a7794 # R-Car E2 |
| 24 | - const: renesas,rcar-gen2-usb-phy # R-Car Gen2 or RZ/G1 |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | |
| 29 | '#address-cells': |
| 30 | const: 1 |
| 31 | |
| 32 | '#size-cells': |
| 33 | const: 0 |
| 34 | |
| 35 | clocks: |
| 36 | maxItems: 1 |
| 37 | |
| 38 | clock-names: |
| 39 | items: |
| 40 | - const: usbhs |
| 41 | |
| 42 | power-domains: |
| 43 | maxItems: 1 |
| 44 | |
| 45 | resets: |
| 46 | maxItems: 1 |
| 47 | |
| 48 | patternProperties: |
| 49 | "^usb-phy@[02]$": |
| 50 | type: object |
| 51 | description: Subnode corresponding to a USB channel. |
| 52 | |
| 53 | properties: |
| 54 | reg: |
| 55 | description: FIXME RZ/G1C supports channel 0 only |
| 56 | enum: [0, 2] |
| 57 | |
| 58 | '#phy-cells': |
| 59 | description: | |
| 60 | The phandle's argument in the PHY specifier is the USB controller |
| 61 | selector for the USB channel. |
| 62 | For RZ/G1C: |
| 63 | - 0 for EHCI/OHCI |
| 64 | - 1 for HS-USB |
| 65 | For all other SoCS: |
| 66 | - 0 for PCI EHCI/OHCI |
| 67 | - 1 for HS-USB (channel 0) or xHCI (channel 2) |
| 68 | const: 1 |
| 69 | |
| 70 | required: |
| 71 | - reg |
| 72 | - '#phy-cells' |
| 73 | |
| 74 | additionalProperties: false |
| 75 | |
| 76 | required: |
| 77 | - compatible |
| 78 | - reg |
| 79 | - '#address-cells' |
| 80 | - '#size-cells' |
| 81 | - clocks |
| 82 | - clock-names |
| 83 | - resets |
| 84 | - power-domains |
| 85 | - usb-phy@0 |
| 86 | |
| 87 | if: |
| 88 | properties: |
| 89 | compatible: |
| 90 | contains: |
| 91 | const: renesas,usb-phy-r8a77470 |
| 92 | then: |
| 93 | properties: |
| 94 | usb-phy@2: false |
| 95 | else: |
| 96 | required: |
| 97 | - usb-phy@2 |
| 98 | |
| 99 | additionalProperties: false |
| 100 | |
| 101 | examples: |
| 102 | - | |
| 103 | #include <dt-bindings/clock/r8a7790-cpg-mssr.h> |
| 104 | #include <dt-bindings/power/r8a7790-sysc.h> |
| 105 | usb-phy-controller@e6590100 { |
| 106 | compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy"; |
| 107 | reg = <0xe6590100 0x100>; |
| 108 | #address-cells = <1>; |
| 109 | #size-cells = <0>; |
| 110 | clocks = <&cpg CPG_MOD 704>; |
| 111 | clock-names = "usbhs"; |
| 112 | power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; |
| 113 | resets = <&cpg 704>; |
| 114 | |
| 115 | usb0: usb-phy@0 { |
| 116 | reg = <0>; |
| 117 | #phy-cells = <1>; |
| 118 | }; |
| 119 | usb2: usb-phy@2 { |
| 120 | reg = <2>; |
| 121 | #phy-cells = <1>; |
| 122 | }; |
| 123 | }; |