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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/misc/qcom,fastrpc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm FastRPC Driver
8
9maintainers:
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12description: |
13 The FastRPC implements an IPC (Inter-Processor Communication)
14 mechanism that allows for clients to transparently make remote method
15 invocations across DSP and APPS boundaries. This enables developers
16 to offload tasks to the DSP and free up the application processor for
17 other tasks.
18
19properties:
20 compatible:
21 const: qcom,fastrpc
22
23 label:
24 enum:
25 - adsp
26 - mdsp
27 - sdsp
28 - cdsp
29
30 memory-region:
31 maxItems: 1
32 description:
33 Phandle to a node describing memory to be used for remote heap CMA.
34
35 qcom,glink-channels:
36 description:
37 A list of channels tied to this function, used for matching
38 the function to a set of virtual channels.
39 $ref: /schemas/types.yaml#/definitions/string-array
40 items:
41 - const: fastrpcglink-apps-dsp
42
43 qcom,non-secure-domain:
44 description:
45 Used to mark the current domain as non-secure.
46 type: boolean
47
48 qcom,smd-channels:
49 description:
50 Channel name used for the RPM communication
51 $ref: /schemas/types.yaml#/definitions/string-array
52 items:
53 - const: fastrpcsmd-apps-dsp
54
55 qcom,vmids:
56 description:
57 Virtual machine IDs for remote processor.
58 $ref: /schemas/types.yaml#/definitions/uint32-array
59
60 "#address-cells":
61 const: 1
62
63 "#size-cells":
64 const: 0
65
66patternProperties:
67 "(compute-)?cb@[0-9]*$":
68 type: object
69
70 description: >
71 Each subnode of the Fastrpc represents compute context banks available on the dsp.
72
73 properties:
74 compatible:
75 const: qcom,fastrpc-compute-cb
76
77 reg:
78 maxItems: 1
79
Tom Rini6bb92fc2024-05-20 09:54:58 -060080 dma-coherent: true
81
Tom Rini53633a82024-02-29 12:33:36 -050082 iommus:
83 minItems: 1
84 maxItems: 3
85
86 qcom,nsessions:
87 $ref: /schemas/types.yaml#/definitions/uint32
88 default: 1
89 description: >
90 A value indicating how many sessions can share this context bank.
91
92 required:
93 - compatible
94 - reg
95
96 additionalProperties: false
97
98required:
99 - compatible
100 - label
101 - "#address-cells"
102 - "#size-cells"
103
104additionalProperties: false
105
106examples:
107 - |
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
109 #include <dt-bindings/mailbox/qcom-ipcc.h>
110
111 glink-edge {
112 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
113 IPCC_MPROC_SIGNAL_GLINK_QMP
114 IRQ_TYPE_EDGE_RISING>;
115 mboxes = <&ipcc IPCC_CLIENT_LPASS
116 IPCC_MPROC_SIGNAL_GLINK_QMP>;
117 label = "lpass";
118 qcom,remote-pid = <2>;
119
120 fastrpc {
121 compatible = "qcom,fastrpc";
122 qcom,glink-channels = "fastrpcglink-apps-dsp";
123 label = "sdsp";
124 qcom,non-secure-domain;
125 #address-cells = <1>;
126 #size-cells = <0>;
127
128 compute-cb@1 {
129 compatible = "qcom,fastrpc-compute-cb";
130 reg = <1>;
131 iommus = <&apps_smmu 0x0541 0x0>;
132 };
133
134 compute-cb@2 {
135 compatible = "qcom,fastrpc-compute-cb";
136 reg = <2>;
137 iommus = <&apps_smmu 0x0542 0x0>;
138 };
139
140 compute-cb@3 {
141 compatible = "qcom,fastrpc-compute-cb";
142 reg = <3>;
143 iommus = <&apps_smmu 0x0543 0x0>;
144 };
145 };
146 };