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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Toshiba TC358775 DSI to LVDS bridge
8
9maintainers:
10 - Vinay Simha BN <simhavcs@gmail.com>
11
12description: |
13 This binding supports DSI to LVDS bridge TC358775
14
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
16 Video frame size:
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
18 limited by 135 MHz LVDS speed
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
20 panel, limited by 270 MHz LVDS speed.
21
22properties:
23 compatible:
24 const: toshiba,tc358775
25
26 reg:
27 maxItems: 1
28 description: i2c address of the bridge, 0x0f
29
30 vdd-supply:
31 description: 1.2V LVDS Power Supply
32
33 vddio-supply:
34 description: 1.8V IO Power Supply
35
36 stby-gpios:
37 maxItems: 1
38 description: Standby pin, Low active
39
40 reset-gpios:
41 maxItems: 1
42 description: Hardware reset, Low active
43
44 ports:
45 $ref: /schemas/graph.yaml#/properties/ports
46
47 properties:
48 port@0:
49 $ref: /schemas/graph.yaml#/properties/port
50 description: |
51 DSI Input. The remote endpoint phandle should be a
52 reference to a valid mipi_dsi_host device node.
53
54 port@1:
55 $ref: /schemas/graph.yaml#/properties/port
56 description: |
57 Video port for LVDS output (panel or connector).
58
59 port@2:
60 $ref: /schemas/graph.yaml#/properties/port
61 description: |
62 Video port for Dual link LVDS output (panel or connector).
63
64 required:
65 - port@0
66 - port@1
67
68required:
69 - compatible
70 - reg
71 - vdd-supply
72 - vddio-supply
73 - stby-gpios
74 - reset-gpios
75 - ports
76
77additionalProperties: false
78
79examples:
80 - |
81 #include <dt-bindings/gpio/gpio.h>
82
83 /* For single-link LVDS display panel */
84
85 i2c@78b8000 {
86 /* On High speed expansion */
87 label = "HS-I2C2";
88 reg = <0x078b8000 0x500>;
89 clock-frequency = <400000>; /* fastmode operation */
90 #address-cells = <1>;
91 #size-cells = <0>;
92
93 tc_bridge: bridge@f {
94 compatible = "toshiba,tc358775";
95 reg = <0x0f>;
96
97 vdd-supply = <&pm8916_l2>;
98 vddio-supply = <&pm8916_l6>;
99
100 stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>;
101 reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>;
102
103 ports {
104 #address-cells = <1>;
105 #size-cells = <0>;
106
107 port@0 {
108 reg = <0>;
109 d2l_in_test: endpoint {
110 remote-endpoint = <&dsi0_out>;
111 };
112 };
113
114 port@1 {
115 reg = <1>;
116 lvds_out: endpoint {
117 remote-endpoint = <&panel_in>;
118 };
119 };
120 };
121 };
122 };
123
124 dsi@1a98000 {
125 reg = <0x1a98000 0x25c>;
126 reg-names = "dsi_ctrl";
127
128 ports {
129 #address-cells = <1>;
130 #size-cells = <0>;
131 port@1 {
132 reg = <1>;
133 dsi0_out: endpoint {
134 remote-endpoint = <&d2l_in_test>;
135 data-lanes = <0 1 2 3>;
136 };
137 };
138 };
139 };
140
141 - |
142 /* For dual-link LVDS display panel */
143
144 i2c@78b8000 {
145 /* On High speed expansion */
146 label = "HS-I2C2";
147 reg = <0x078b8000 0x500>;
148 clock-frequency = <400000>; /* fastmode operation */
149 #address-cells = <1>;
150 #size-cells = <0>;
151
152 tc_bridge_dual: bridge@f {
153 compatible = "toshiba,tc358775";
154 reg = <0x0f>;
155
156 vdd-supply = <&pm8916_l2>;
157 vddio-supply = <&pm8916_l6>;
158
159 stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>;
160 reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>;
161
162 ports {
163 #address-cells = <1>;
164 #size-cells = <0>;
165
166 port@0 {
167 reg = <0>;
168 d2l_in_dual: endpoint {
169 remote-endpoint = <&dsi0_out_dual>;
170 };
171 };
172
173 port@1 {
174 reg = <1>;
175 lvds0_out: endpoint {
176 remote-endpoint = <&panel_in0>;
177 };
178 };
179
180 port@2 {
181 reg = <2>;
182 lvds1_out: endpoint {
183 remote-endpoint = <&panel_in1>;
184 };
185 };
186 };
187 };
188 };
189
190 dsi@1a98000 {
191 reg = <0x1a98000 0x25c>;
192 reg-names = "dsi_ctrl";
193
194 ports {
195 #address-cells = <1>;
196 #size-cells = <0>;
197 port@1 {
198 reg = <1>;
199 dsi0_out_dual: endpoint {
200 remote-endpoint = <&d2l_in_dual>;
201 data-lanes = <0 1 2 3>;
202 };
203 };
204 };
205 };
206...