| Mario Six | 1faf95d | 2019-01-21 09:18:03 +0100 | [diff] [blame] | 1 | #ifdef CONFIG_ELBC_BR0_OR0 |
| 2 | #define CONFIG_SYS_BR0_PRELIM (\ |
| 3 | CONFIG_BR0_OR0_BASE |\ |
| 4 | CONFIG_BR0_PORTSIZE |\ |
| 5 | CONFIG_BR0_ERRORCHECKING |\ |
| 6 | CONFIG_BR0_WRITE_PROTECT_BIT |\ |
| 7 | CONFIG_BR0_MACHINE |\ |
| 8 | CONFIG_BR0_ATOMIC |\ |
| 9 | CONFIG_BR0_VALID_BIT \ |
| 10 | ) |
| 11 | #define CONFIG_SYS_OR0_PRELIM (\ |
| 12 | CONFIG_OR0_AM |\ |
| 13 | CONFIG_OR0_XAM |\ |
| 14 | CONFIG_OR0_BCTLD |\ |
| 15 | CONFIG_OR0_BI |\ |
| 16 | CONFIG_OR0_COLS |\ |
| 17 | CONFIG_OR0_ROWS |\ |
| 18 | CONFIG_OR0_PMSEL |\ |
| 19 | CONFIG_OR0_SCY |\ |
| 20 | CONFIG_OR0_PGS |\ |
| 21 | CONFIG_OR0_CSCT |\ |
| 22 | CONFIG_OR0_CST |\ |
| 23 | CONFIG_OR0_CHT |\ |
| 24 | CONFIG_OR0_RST |\ |
| 25 | CONFIG_OR0_CSNT |\ |
| 26 | CONFIG_OR0_ACS |\ |
| 27 | CONFIG_OR0_XACS |\ |
| 28 | CONFIG_OR0_SETA |\ |
| 29 | CONFIG_OR0_TRLX |\ |
| 30 | CONFIG_OR0_EHTR |\ |
| 31 | CONFIG_OR0_EAD \ |
| 32 | ) |
| 33 | #endif /* CONFIG_ELBC_BR0_OR0 */ |
| 34 | |
| 35 | #ifdef CONFIG_ELBC_BR1_OR1 |
| 36 | #define CONFIG_SYS_BR1_PRELIM (\ |
| 37 | CONFIG_BR1_OR1_BASE |\ |
| 38 | CONFIG_BR1_PORTSIZE |\ |
| 39 | CONFIG_BR1_ERRORCHECKING |\ |
| 40 | CONFIG_BR1_WRITE_PROTECT_BIT |\ |
| 41 | CONFIG_BR1_MACHINE |\ |
| 42 | CONFIG_BR1_ATOMIC |\ |
| 43 | CONFIG_BR1_VALID_BIT \ |
| 44 | ) |
| 45 | #define CONFIG_SYS_OR1_PRELIM (\ |
| 46 | CONFIG_OR1_AM |\ |
| 47 | CONFIG_OR1_XAM |\ |
| 48 | CONFIG_OR1_BCTLD |\ |
| 49 | CONFIG_OR1_BI |\ |
| 50 | CONFIG_OR1_COLS |\ |
| 51 | CONFIG_OR1_ROWS |\ |
| 52 | CONFIG_OR1_PMSEL |\ |
| 53 | CONFIG_OR1_SCY |\ |
| 54 | CONFIG_OR1_PGS |\ |
| 55 | CONFIG_OR1_CSCT |\ |
| 56 | CONFIG_OR1_CST |\ |
| 57 | CONFIG_OR1_CHT |\ |
| 58 | CONFIG_OR1_RST |\ |
| 59 | CONFIG_OR1_CSNT |\ |
| 60 | CONFIG_OR1_ACS |\ |
| 61 | CONFIG_OR1_XACS |\ |
| 62 | CONFIG_OR1_SETA |\ |
| 63 | CONFIG_OR1_TRLX |\ |
| 64 | CONFIG_OR1_EHTR |\ |
| 65 | CONFIG_OR1_EAD \ |
| 66 | ) |
| 67 | #endif /* CONFIG_ELBC_BR1_OR1 */ |
| 68 | |
| 69 | #ifdef CONFIG_ELBC_BR2_OR2 |
| 70 | #define CONFIG_SYS_BR2_PRELIM (\ |
| 71 | CONFIG_BR2_OR2_BASE |\ |
| 72 | CONFIG_BR2_PORTSIZE |\ |
| 73 | CONFIG_BR2_ERRORCHECKING |\ |
| 74 | CONFIG_BR2_WRITE_PROTECT_BIT |\ |
| 75 | CONFIG_BR2_MACHINE |\ |
| 76 | CONFIG_BR2_ATOMIC |\ |
| 77 | CONFIG_BR2_VALID_BIT \ |
| 78 | ) |
| 79 | #define CONFIG_SYS_OR2_PRELIM (\ |
| 80 | CONFIG_OR2_AM |\ |
| 81 | CONFIG_OR2_XAM |\ |
| 82 | CONFIG_OR2_BCTLD |\ |
| 83 | CONFIG_OR2_BI |\ |
| 84 | CONFIG_OR2_COLS |\ |
| 85 | CONFIG_OR2_ROWS |\ |
| 86 | CONFIG_OR2_PMSEL |\ |
| 87 | CONFIG_OR2_SCY |\ |
| 88 | CONFIG_OR2_PGS |\ |
| 89 | CONFIG_OR2_CSCT |\ |
| 90 | CONFIG_OR2_CST |\ |
| 91 | CONFIG_OR2_CHT |\ |
| 92 | CONFIG_OR2_RST |\ |
| 93 | CONFIG_OR2_CSNT |\ |
| 94 | CONFIG_OR2_ACS |\ |
| 95 | CONFIG_OR2_XACS |\ |
| 96 | CONFIG_OR2_SETA |\ |
| 97 | CONFIG_OR2_TRLX |\ |
| 98 | CONFIG_OR2_EHTR |\ |
| 99 | CONFIG_OR2_EAD \ |
| 100 | ) |
| 101 | #endif /* CONFIG_ELBC_BR2_OR2 */ |
| 102 | |
| 103 | #ifdef CONFIG_ELBC_BR3_OR3 |
| 104 | #define CONFIG_SYS_BR3_PRELIM (\ |
| 105 | CONFIG_BR3_OR3_BASE |\ |
| 106 | CONFIG_BR3_PORTSIZE |\ |
| 107 | CONFIG_BR3_ERRORCHECKING |\ |
| 108 | CONFIG_BR3_WRITE_PROTECT_BIT |\ |
| 109 | CONFIG_BR3_MACHINE |\ |
| 110 | CONFIG_BR3_ATOMIC |\ |
| 111 | CONFIG_BR3_VALID_BIT \ |
| 112 | ) |
| 113 | #define CONFIG_SYS_OR3_PRELIM (\ |
| 114 | CONFIG_OR3_AM |\ |
| 115 | CONFIG_OR3_XAM |\ |
| 116 | CONFIG_OR3_BCTLD |\ |
| 117 | CONFIG_OR3_BI |\ |
| 118 | CONFIG_OR3_COLS |\ |
| 119 | CONFIG_OR3_ROWS |\ |
| 120 | CONFIG_OR3_PMSEL |\ |
| 121 | CONFIG_OR3_SCY |\ |
| 122 | CONFIG_OR3_PGS |\ |
| 123 | CONFIG_OR3_CSCT |\ |
| 124 | CONFIG_OR3_CST |\ |
| 125 | CONFIG_OR3_CHT |\ |
| 126 | CONFIG_OR3_RST |\ |
| 127 | CONFIG_OR3_CSNT |\ |
| 128 | CONFIG_OR3_ACS |\ |
| 129 | CONFIG_OR3_XACS |\ |
| 130 | CONFIG_OR3_SETA |\ |
| 131 | CONFIG_OR3_TRLX |\ |
| 132 | CONFIG_OR3_EHTR |\ |
| 133 | CONFIG_OR3_EAD \ |
| 134 | ) |
| 135 | #endif /* CONFIG_ELBC_BR3_OR3 */ |
| 136 | |
| 137 | #ifdef CONFIG_ELBC_BR4_OR4 |
| 138 | #define CONFIG_SYS_BR4_PRELIM (\ |
| 139 | CONFIG_BR4_OR4_BASE |\ |
| 140 | CONFIG_BR4_PORTSIZE |\ |
| 141 | CONFIG_BR4_ERRORCHECKING |\ |
| 142 | CONFIG_BR4_WRITE_PROTECT_BIT |\ |
| 143 | CONFIG_BR4_MACHINE |\ |
| 144 | CONFIG_BR4_ATOMIC |\ |
| 145 | CONFIG_BR4_VALID_BIT \ |
| 146 | ) |
| 147 | #define CONFIG_SYS_OR4_PRELIM (\ |
| 148 | CONFIG_OR4_AM |\ |
| 149 | CONFIG_OR4_XAM |\ |
| 150 | CONFIG_OR4_BCTLD |\ |
| 151 | CONFIG_OR4_BI |\ |
| 152 | CONFIG_OR4_COLS |\ |
| 153 | CONFIG_OR4_ROWS |\ |
| 154 | CONFIG_OR4_PMSEL |\ |
| 155 | CONFIG_OR4_SCY |\ |
| 156 | CONFIG_OR4_PGS |\ |
| 157 | CONFIG_OR4_CSCT |\ |
| 158 | CONFIG_OR4_CST |\ |
| 159 | CONFIG_OR4_CHT |\ |
| 160 | CONFIG_OR4_RST |\ |
| 161 | CONFIG_OR4_CSNT |\ |
| 162 | CONFIG_OR4_ACS |\ |
| 163 | CONFIG_OR4_XACS |\ |
| 164 | CONFIG_OR4_SETA |\ |
| 165 | CONFIG_OR4_TRLX |\ |
| 166 | CONFIG_OR4_EHTR |\ |
| 167 | CONFIG_OR4_EAD \ |
| 168 | ) |
| 169 | #endif /* CONFIG_ELBC_BR4_OR4 */ |
| 170 | |
| 171 | #if defined(CONFIG_ELBC_BR_OR_NAND_PRELIM_0) |
| 172 | #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR0_PRELIM |
| 173 | #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR0_PRELIM |
| 174 | #elif defined(CONFIG_ELBC_BR_OR_NAND_PRELIM_1) |
| 175 | #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM |
| 176 | #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM |
| 177 | #elif defined(CONFIG_ELBC_BR_OR_NAND_PRELIM_2) |
| 178 | #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR2_PRELIM |
| 179 | #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR2_PRELIM |
| 180 | #elif defined(CONFIG_ELBC_BR_OR_NAND_PRELIM_3) |
| 181 | #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR3_PRELIM |
| 182 | #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR3_PRELIM |
| 183 | #elif defined(CONFIG_ELBC_BR_OR_NAND_PRELIM_4) |
| 184 | #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR4_PRELIM |
| 185 | #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR4_PRELIM |
| 186 | #endif |