| MD Danish Anwar | 89d709b | 2024-04-04 12:38:00 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver |
| 3 | * |
| 4 | * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | #ifndef __NET_TI_ICSSG_PRUETH_H |
| 9 | #define __NET_TI_ICSSG_PRUETH_H |
| 10 | |
| 11 | #include <asm/io.h> |
| 12 | #include <clk.h> |
| 13 | #include <dm/lists.h> |
| 14 | #include <dm/ofnode.h> |
| 15 | #include <dm/device.h> |
| 16 | #include <dma-uclass.h> |
| 17 | #include <regmap.h> |
| 18 | #include <linux/sizes.h> |
| 19 | #include <linux/pruss_driver.h> |
| 20 | #include "icssg_config.h" |
| 21 | #include "icssg_switch_map.h" |
| 22 | |
| 23 | void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac); |
| 24 | void icssg_class_set_host_mac_addr(struct regmap *miig_rt, u8 *mac); |
| 25 | void icssg_class_disable(struct regmap *miig_rt, int slice); |
| 26 | void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti); |
| 27 | void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr); |
| 28 | |
| 29 | enum prueth_mac { |
| 30 | PRUETH_MAC0 = 0, |
| 31 | PRUETH_MAC1, |
| 32 | PRUETH_NUM_MACS, |
| 33 | }; |
| 34 | |
| 35 | enum prueth_port { |
| 36 | PRUETH_PORT_HOST = 0, /* host side port */ |
| 37 | PRUETH_PORT_MII0, /* physical port MII 0 */ |
| 38 | PRUETH_PORT_MII1, /* physical port MII 1 */ |
| 39 | }; |
| 40 | |
| 41 | struct prueth { |
| 42 | struct udevice *dev; |
| 43 | struct udevice *pruss; |
| 44 | struct regmap *miig_rt; |
| 45 | struct regmap *mii_rt; |
| 46 | fdt_addr_t mdio_base; |
| 47 | struct pruss_mem_region shram; |
| 48 | struct pruss_mem_region dram[PRUETH_NUM_MACS]; |
| 49 | phys_addr_t tmaddr; |
| 50 | struct mii_dev *bus; |
| 51 | u32 sram_pa; |
| 52 | ofnode eth_node[PRUETH_NUM_MACS]; |
| 53 | u32 mdio_freq; |
| 54 | int phy_interface; |
| 55 | struct clk mdiofck; |
| 56 | struct dma dma_tx; |
| 57 | struct dma dma_rx; |
| 58 | struct dma dma_rx_mgm; |
| 59 | u32 rx_next; |
| 60 | u32 rx_pend; |
| 61 | int slice; |
| 62 | bool mdio_manual_mode; |
| 63 | int speed; |
| 64 | int duplex; |
| MD Danish Anwar | dd18b89 | 2024-04-04 12:38:02 +0530 | [diff] [blame] | 65 | u8 pru_core_id; |
| 66 | u8 rtu_core_id; |
| 67 | u8 txpru_core_id; |
| MD Danish Anwar | 6b8c29e | 2024-04-04 12:38:03 +0530 | [diff] [blame^] | 68 | u8 icssg_hwcmdseq; |
| MD Danish Anwar | 89d709b | 2024-04-04 12:38:00 +0530 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | struct prueth_priv { |
| 72 | struct udevice *dev; |
| 73 | struct prueth *prueth; |
| 74 | u32 port_id; |
| 75 | struct phy_device *phydev; |
| 76 | bool has_phy; |
| 77 | ofnode phy_node; |
| 78 | u32 phy_addr; |
| 79 | int phy_interface; |
| 80 | }; |
| 81 | |
| 82 | /* config helpers */ |
| 83 | void icssg_config_ipg(struct prueth_priv *priv, int speed, int mii); |
| 84 | int icssg_config(struct prueth_priv *priv); |
| 85 | int emac_set_port_state(struct prueth_priv *priv, enum icssg_port_state_cmd cmd); |
| 86 | |
| MD Danish Anwar | 6712abb | 2024-04-04 12:38:01 +0530 | [diff] [blame] | 87 | /* Buffer queue helpers */ |
| 88 | int icssg_queue_pop(struct prueth *prueth, u8 queue); |
| 89 | void icssg_queue_push(struct prueth *prueth, int queue, u16 addr); |
| 90 | u32 icssg_queue_level(struct prueth *prueth, int queue); |
| 91 | |
| MD Danish Anwar | 6b8c29e | 2024-04-04 12:38:03 +0530 | [diff] [blame^] | 92 | /* FDB helpers */ |
| 93 | int icssg_send_fdb_msg(struct prueth_priv *priv, struct mgmt_cmd *cmd, |
| 94 | struct mgmt_cmd_rsp *rsp); |
| 95 | int emac_fdb_flow_id_updated(struct prueth_priv *priv); |
| 96 | |
| MD Danish Anwar | 89d709b | 2024-04-04 12:38:00 +0530 | [diff] [blame] | 97 | #endif /* __NET_TI_ICSSG_PRUETH_H */ |