| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /dts-v1/; |
| 3 | |
| 4 | / { |
| 5 | compatible = "cdns,xtensa-iss"; |
| 6 | #address-cells = <1>; |
| 7 | #size-cells = <1>; |
| 8 | interrupt-parent = <&pic>; |
| 9 | |
| 10 | chosen { |
| 11 | bootargs = "console=ttyS0,115200n8 debug"; |
| 12 | }; |
| 13 | |
| 14 | memory@0 { |
| 15 | device_type = "memory"; |
| 16 | reg = <0x00000000 0x80000000>; |
| 17 | }; |
| 18 | |
| 19 | cpus { |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <0>; |
| 22 | cpu@0 { |
| 23 | compatible = "cdns,xtensa-cpu"; |
| 24 | reg = <0>; |
| 25 | clocks = <&osc>; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | clocks { |
| 30 | osc: osc { |
| 31 | #clock-cells = <0>; |
| 32 | compatible = "fixed-clock"; |
| 33 | clock-frequency = <40000000>; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | pic: pic { |
| 38 | compatible = "cdns,xtensa-pic"; |
| 39 | /* one cell: internal irq number, |
| 40 | * two cells: second cell == 0: internal irq number |
| 41 | * second cell == 1: external irq number |
| 42 | */ |
| 43 | #address-cells = <0>; |
| 44 | #interrupt-cells = <2>; |
| 45 | interrupt-controller; |
| 46 | }; |
| 47 | |
| 48 | pci { |
| 49 | compatible = "pci-host-ecam-generic"; |
| 50 | device_type = "pci"; |
| 51 | #address-cells = <3>; |
| 52 | #size-cells = <2>; |
| 53 | #interrupt-cells = <0x1>; |
| 54 | |
| 55 | bus-range = <0x0 0x3e>; |
| 56 | reg = <0xf0100000 0x03f00000>; |
| 57 | |
| 58 | // BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2) |
| 59 | ranges = <0x01000000 0x0 0x00000000 0xf0000000 0x0 0x00010000>, |
| 60 | <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>; |
| 61 | |
| 62 | // PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2) |
| 63 | interrupt-map = < |
| 64 | 0x0000 0x0 0x0 0x1 &pic 0x0 0x1 |
| 65 | 0x0800 0x0 0x0 0x1 &pic 0x1 0x1 |
| 66 | 0x1000 0x0 0x0 0x1 &pic 0x2 0x1 |
| 67 | 0x1800 0x0 0x0 0x1 &pic 0x3 0x1 |
| 68 | >; |
| 69 | |
| 70 | interrupt-map-mask = <0x1800 0x0 0x0 0x7>; |
| 71 | }; |
| 72 | }; |