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git01.mediatek.com / filogic / uboot / 6b642aca7f571e777924f50732f530fd94b03bfb / . / src / arm64 / rockchip / rk3566-rock-3c.dts
blob: f2cc086e5001a66d40bbe6672389779711d59def [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4#include <dt-bindings/gpio/gpio.h>
5#include <dt-bindings/leds/common.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/soc/rockchip,vop2.h>
8#include "rk3566.dtsi"
9
10/ {
11 model = "Radxa ROCK 3C";
12 compatible = "radxa,rock-3c", "rockchip,rk3566";
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdhci;
17 mmc1 = &sdmmc0;
18 mmc2 = &sdmmc1;
19 };
20
21 chosen: chosen {
22 stdout-path = "serial2:1500000n8";
23 };
24
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
29 #clock-cells = <0>;
30 };
31
32 hdmi-con {
33 compatible = "hdmi-connector";
34 type = "a";
35
36 port {
37 hdmi_con_in: endpoint {
38 remote-endpoint = <&hdmi_out_con>;
39 };
40 };
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 led-0 {
47 gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
48 function = LED_FUNCTION_HEARTBEAT;
49 color = <LED_COLOR_ID_BLUE>;
50 linux,default-trigger = "heartbeat";
51 pinctrl-names = "default";
52 pinctrl-0 = <&user_led2>;
53 };
54 };
55
56 sdio_pwrseq: sdio-pwrseq {
57 compatible = "mmc-pwrseq-simple";
58 clocks = <&rk809 1>;
59 clock-names = "ext_clock";
60 pinctrl-names = "default";
61 pinctrl-0 = <&wifi_reg_on_h>;
62 post-power-on-delay-ms = <100>;
63 power-off-delay-us = <5000000>;
64 reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
65 };
66
67 vcc5v_dcin: vcc5v-dcin-regulator {
68 compatible = "regulator-fixed";
69 regulator-name = "vcc5v_dcin";
70 regulator-always-on;
71 regulator-boot-on;
72 regulator-min-microvolt = <5000000>;
73 regulator-max-microvolt = <5000000>;
74 };
75
76 vcc3v3_pcie: vcc3v3-pcie-regulator {
77 compatible = "regulator-fixed";
78 enable-active-high;
79 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&pcie_pwr_en>;
82 regulator-name = "vcc3v3_pcie";
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
85 vin-supply = <&vcc3v3_sys>;
86 };
87
88 vcc3v3_sys: vcc3v3-sys-regulator {
89 compatible = "regulator-fixed";
90 regulator-name = "vcc3v3_sys";
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 vin-supply = <&vcc5v0_sys>;
96 };
97
98 vcc5v0_sys: vcc5v0-sys-regulator {
99 compatible = "regulator-fixed";
100 regulator-name = "vcc5v0_sys";
101 regulator-always-on;
102 regulator-boot-on;
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
105 vin-supply = <&vcc5v_dcin>;
106 };
107
108 vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
109 compatible = "regulator-fixed";
110 enable-active-high;
111 gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&vcc5v0_usb30_host_en>;
114 regulator-name = "vcc5v0_usb30_host";
115 regulator-min-microvolt = <5000000>;
116 regulator-max-microvolt = <5000000>;
117 vin-supply = <&vcc5v0_sys>;
118 };
119
120 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
121 compatible = "regulator-fixed";
122 enable-active-high;
123 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&vcc5v0_usb_otg_en>;
126 regulator-name = "vcc5v0_usb_otg";
127 regulator-min-microvolt = <5000000>;
128 regulator-max-microvolt = <5000000>;
129 vin-supply = <&vcc5v0_sys>;
130 };
131
132 vcc_cam: vcc-cam-regulator {
133 compatible = "regulator-fixed";
134 enable-active-high;
135 gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&vcc_cam_en>;
138 regulator-name = "vcc_cam";
139 regulator-min-microvolt = <3300000>;
140 regulator-max-microvolt = <3300000>;
141 vin-supply = <&vcc3v3_sys>;
142
143 regulator-state-mem {
144 regulator-off-in-suspend;
145 };
146 };
147
148 vcc_mipi: vcc-mipi-regulator {
149 compatible = "regulator-fixed";
150 enable-active-high;
151 gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&vcc_mipi_en>;
154 regulator-name = "vcc_mipi";
155 regulator-min-microvolt = <3300000>;
156 regulator-max-microvolt = <3300000>;
157 vin-supply = <&vcc3v3_sys>;
158
159 regulator-state-mem {
160 regulator-off-in-suspend;
161 };
162 };
163};
164
165&combphy1 {
166 status = "okay";
167};
168
169&combphy2 {
170 status = "okay";
171};
172
173&cpu0 {
174 cpu-supply = <&vdd_cpu>;
175};
176
177&cpu1 {
178 cpu-supply = <&vdd_cpu>;
179};
180
181&cpu2 {
182 cpu-supply = <&vdd_cpu>;
183};
184
185&cpu3 {
186 cpu-supply = <&vdd_cpu>;
187};
188
189&gmac1 {
190 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
191 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
192 clock_in_out = "input";
193 phy-handle = <&rgmii_phy1>;
194 phy-mode = "rgmii-id";
195 phy-supply = <&vcc_3v3>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&gmac1m1_miim
198 &gmac1m1_tx_bus2
199 &gmac1m1_rx_bus2
200 &gmac1m1_rgmii_clk
201 &gmac1m1_rgmii_bus
202 &gmac1m1_clkinout>;
203 status = "okay";
204};
205
206&gpu {
207 mali-supply = <&vdd_gpu>;
208 status = "okay";
209};
210
211&hdmi {
212 avdd-0v9-supply = <&vdda0v9_image>;
213 avdd-1v8-supply = <&vcca1v8_image>;
214 status = "okay";
215};
216
217&hdmi_in {
218 hdmi_in_vp0: endpoint {
219 remote-endpoint = <&vp0_out_hdmi>;
220 };
221};
222
223&hdmi_out {
224 hdmi_out_con: endpoint {
225 remote-endpoint = <&hdmi_con_in>;
226 };
227};
228
229&hdmi_sound {
230 status = "okay";
231};
232
233&i2c0 {
234 status = "okay";
235
236 vdd_cpu: regulator@1c {
237 compatible = "tcs,tcs4525";
238 reg = <0x1c>;
239 fcs,suspend-voltage-selector = <1>;
240 regulator-name = "vdd_cpu";
241 regulator-always-on;
242 regulator-boot-on;
243 regulator-min-microvolt = <800000>;
244 regulator-max-microvolt = <1150000>;
245 regulator-ramp-delay = <2300>;
246 vin-supply = <&vcc5v0_sys>;
247
248 regulator-state-mem {
249 regulator-off-in-suspend;
250 };
251 };
252
253 rk809: pmic@20 {
254 compatible = "rockchip,rk809";
255 reg = <0x20>;
256 interrupt-parent = <&gpio0>;
257 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
258 clock-output-names = "rk808-clkout1", "rk808-clkout2";
259 pinctrl-names = "default";
260 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
261 system-power-controller;
262 vcc1-supply = <&vcc3v3_sys>;
263 vcc2-supply = <&vcc3v3_sys>;
264 vcc3-supply = <&vcc3v3_sys>;
265 vcc4-supply = <&vcc3v3_sys>;
266 vcc5-supply = <&vcc3v3_sys>;
267 vcc6-supply = <&vcc3v3_sys>;
268 vcc7-supply = <&vcc3v3_sys>;
269 vcc8-supply = <&vcc3v3_sys>;
270 vcc9-supply = <&vcc3v3_sys>;
271 wakeup-source;
272 #clock-cells = <1>;
273
274 regulators {
275 vdd_logic: DCDC_REG1 {
276 regulator-name = "vdd_logic";
277 regulator-always-on;
278 regulator-boot-on;
279 regulator-initial-mode = <0x2>;
280 regulator-min-microvolt = <500000>;
281 regulator-max-microvolt = <1350000>;
282 regulator-ramp-delay = <6001>;
283
284 regulator-state-mem {
285 regulator-off-in-suspend;
286 regulator-suspend-microvolt = <900000>;
287 };
288 };
289
290 vdd_gpu: DCDC_REG2 {
291 regulator-name = "vdd_gpu";
292 regulator-always-on;
293 regulator-boot-on;
294 regulator-initial-mode = <0x2>;
295 regulator-min-microvolt = <500000>;
296 regulator-max-microvolt = <1350000>;
297 regulator-ramp-delay = <6001>;
298
299 regulator-state-mem {
300 regulator-off-in-suspend;
301 regulator-suspend-microvolt = <900000>;
302 };
303 };
304
305 vcc_ddr: DCDC_REG3 {
306 regulator-name = "vcc_ddr";
307 regulator-always-on;
308 regulator-boot-on;
309 regulator-initial-mode = <0x2>;
310
311 regulator-state-mem {
312 regulator-on-in-suspend;
313 };
314 };
315
316 vdd_npu: DCDC_REG4 {
317 regulator-name = "vdd_npu";
318 regulator-initial-mode = <0x2>;
319 regulator-min-microvolt = <500000>;
320 regulator-max-microvolt = <1350000>;
321 regulator-ramp-delay = <6001>;
322
323 regulator-state-mem {
324 regulator-off-in-suspend;
325 };
326 };
327
328 vcc_1v8: DCDC_REG5 {
329 regulator-name = "vcc_1v8";
330 regulator-always-on;
331 regulator-boot-on;
332 regulator-min-microvolt = <1800000>;
333 regulator-max-microvolt = <1800000>;
334
335 regulator-state-mem {
336 regulator-off-in-suspend;
337 };
338 };
339
340 vdda0v9_image: LDO_REG1 {
341 regulator-name = "vdda0v9_image";
342 regulator-min-microvolt = <900000>;
343 regulator-max-microvolt = <900000>;
344
345 regulator-state-mem {
346 regulator-off-in-suspend;
347 };
348 };
349
350 vdda_0v9: LDO_REG2 {
351 regulator-name = "vdda_0v9";
352 regulator-always-on;
353 regulator-boot-on;
354 regulator-min-microvolt = <900000>;
355 regulator-max-microvolt = <900000>;
356
357 regulator-state-mem {
358 regulator-off-in-suspend;
359 };
360 };
361
362 vdda0v9_pmu: LDO_REG3 {
363 regulator-name = "vdda0v9_pmu";
364 regulator-always-on;
365 regulator-boot-on;
366 regulator-min-microvolt = <900000>;
367 regulator-max-microvolt = <900000>;
368
369 regulator-state-mem {
370 regulator-on-in-suspend;
371 regulator-suspend-microvolt = <900000>;
372 };
373 };
374
375 vccio_acodec: LDO_REG4 {
376 regulator-name = "vccio_acodec";
377 regulator-always-on;
378 regulator-boot-on;
379 regulator-min-microvolt = <3300000>;
380 regulator-max-microvolt = <3300000>;
381
382 regulator-state-mem {
383 regulator-off-in-suspend;
384 };
385 };
386
387 vccio_sd: LDO_REG5 {
388 regulator-name = "vccio_sd";
389 regulator-min-microvolt = <1800000>;
390 regulator-max-microvolt = <3300000>;
391
392 regulator-state-mem {
393 regulator-off-in-suspend;
394 };
395 };
396
397 vcc3v3_pmu: LDO_REG6 {
398 regulator-name = "vcc3v3_pmu";
399 regulator-always-on;
400 regulator-boot-on;
401 regulator-min-microvolt = <3300000>;
402 regulator-max-microvolt = <3300000>;
403
404 regulator-state-mem {
405 regulator-on-in-suspend;
406 regulator-suspend-microvolt = <3300000>;
407 };
408 };
409
410 vcca_1v8: LDO_REG7 {
411 regulator-name = "vcca_1v8";
412 regulator-always-on;
413 regulator-boot-on;
414 regulator-min-microvolt = <1800000>;
415 regulator-max-microvolt = <1800000>;
416
417 regulator-state-mem {
418 regulator-off-in-suspend;
419 };
420 };
421
422 vcca1v8_pmu: LDO_REG8 {
423 regulator-name = "vcca1v8_pmu";
424 regulator-always-on;
425 regulator-boot-on;
426 regulator-min-microvolt = <1800000>;
427 regulator-max-microvolt = <1800000>;
428
429 regulator-state-mem {
430 regulator-on-in-suspend;
431 regulator-suspend-microvolt = <1800000>;
432 };
433 };
434
435 vcca1v8_image: LDO_REG9 {
436 regulator-name = "vcca1v8_image";
437 regulator-min-microvolt = <1800000>;
438 regulator-max-microvolt = <1800000>;
439
440 regulator-state-mem {
441 regulator-off-in-suspend;
442 };
443 };
444
445 vcc_3v3: SWITCH_REG1 {
446 regulator-name = "vcc_3v3";
447 regulator-always-on;
448 regulator-boot-on;
449
450 regulator-state-mem {
451 regulator-off-in-suspend;
452 };
453 };
454
455 vcc3v3_sd: SWITCH_REG2 {
456 regulator-name = "vcc3v3_sd";
457
458 regulator-state-mem {
459 regulator-off-in-suspend;
460 };
461 };
462 };
463 };
464
465 eeprom: eeprom@50 {
466 compatible = "belling,bl24c16a", "atmel,24c16";
467 reg = <0x50>;
468 pagesize = <16>;
469 };
470};
471
472&i2s0_8ch {
473 status = "okay";
474};
475
476&i2s1_8ch {
477 pinctrl-names = "default";
478 pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
479 rockchip,trcm-sync-tx-only;
480 status = "okay";
481};
482
483&mdio1 {
484 rgmii_phy1: ethernet-phy@1 {
485 compatible = "ethernet-phy-ieee802.3-c22";
486 reg = <0x1>;
487 reset-assert-us = <20000>;
488 reset-deassert-us = <100000>;
489 reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
490 };
491};
492
493&pcie2x1 {
494 pinctrl-names = "default";
495 pinctrl-0 = <&pcie_reset_h>;
496 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
497 vpcie3v3-supply = <&vcc3v3_pcie>;
498 status = "okay";
499};
500
501&pinctrl {
502 bluetooth {
503 bt_reg_on_h: bt-reg-on-h {
504 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
505 };
506
507 bt_wake_host_h: bt-wake-host-h {
508 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
509 };
510
511 bt_host_wake_h: bt-host-wake-h {
512 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
513 };
514 };
515
516 cam {
517 vcc_cam_en: vcc_cam_en {
518 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
519 };
520 };
521
522 display {
523 vcc_mipi_en: vcc_mipi_en {
524 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
525 };
526 };
527
528 leds {
529 user_led2: user-led2 {
530 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
531 };
532 };
533
534 pcie {
535 pcie_pwr_en: pcie-pwr-en {
536 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
537 };
538
539 pcie_reset_h: pcie-reset-h {
540 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
541 };
542 };
543
544 pmic {
545 pmic_int_l: pmic-int-l {
546 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
547 };
548 };
549
550 usb {
551 vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {
552 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
553 };
554
555 vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
556 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
557 };
558 };
559
560 wifi {
561 wifi_host_wake_h: wifi-host-wake-h {
562 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
563 };
564
565 wifi_reg_on_h: wifi-reg-on-h {
566 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
567 };
568 };
569};
570
571&pmu_io_domains {
572 pmuio1-supply = <&vcc3v3_pmu>;
573 pmuio2-supply = <&vcca1v8_pmu>;
574 vccio1-supply = <&vccio_acodec>;
575 vccio2-supply = <&vcc_1v8>;
576 vccio3-supply = <&vccio_sd>;
577 vccio4-supply = <&vcca1v8_pmu>;
578 vccio5-supply = <&vcc_3v3>;
579 vccio6-supply = <&vcc_3v3>;
580 vccio7-supply = <&vcc_3v3>;
581 status = "okay";
582};
583
584&saradc {
585 vref-supply = <&vcca_1v8>;
586 status = "okay";
587};
588
589&sdhci {
590 bus-width = <8>;
591 max-frequency = <200000000>;
592 mmc-hs200-1_8v;
593 non-removable;
594 pinctrl-names = "default";
595 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
596 vmmc-supply = <&vcc_3v3>;
597 vqmmc-supply = <&vcc_1v8>;
598 status = "okay";
599};
600
601&sdmmc0 {
602 bus-width = <4>;
603 cap-sd-highspeed;
604 disable-wp;
605 pinctrl-names = "default";
606 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
607 sd-uhs-sdr50;
608 vmmc-supply = <&vcc3v3_sys>;
609 vqmmc-supply = <&vccio_sd>;
610 status = "okay";
611};
612
613&sdmmc1 {
614 bus-width = <4>;
615 cap-sd-highspeed;
616 cap-sdio-irq;
617 keep-power-in-suspend;
618 mmc-pwrseq = <&sdio_pwrseq>;
619 non-removable;
620 pinctrl-names = "default";
621 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
622 sd-uhs-sdr104;
623 vmmc-supply = <&vcc3v3_sys>;
624 vqmmc-supply = <&vcca1v8_pmu>;
625 status = "okay";
626};
627
628&sfc {
629 #address-cells = <1>;
630 #size-cells = <0>;
631 status = "okay";
632
633 flash@0 {
634 compatible = "jedec,spi-nor";
635 reg = <0x0>;
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]636 spi-max-frequency = <104000000>;
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]637 spi-rx-bus-width = <4>;
638 spi-tx-bus-width = <1>;
639 };
640};
641
642&tsadc {
643 rockchip,hw-tshut-mode = <1>;
644 rockchip,hw-tshut-polarity = <0>;
645 status = "okay";
646};
647
648&uart1 {
649 pinctrl-names = "default";
650 pinctrl-0 = <&uart1m0_ctsn &uart1m0_rtsn &uart1m0_xfer>;
651 status = "okay";
652};
653
654&uart2 {
655 status = "okay";
656};
657
658&usb_host0_ehci {
659 status = "okay";
660};
661
662&usb_host0_ohci {
663 status = "okay";
664};
665
666&usb_host0_xhci {
667 dr_mode = "host";
668 status = "okay";
669};
670
671&usb_host1_ehci {
672 status = "okay";
673};
674
675&usb_host1_ohci {
676 status = "okay";
677};
678
679&usb_host1_xhci {
680 status = "okay";
681};
682
683&usb2phy0 {
684 status = "okay";
685};
686
687&usb2phy0_host {
688 phy-supply = <&vcc5v0_usb30_host>;
689 status = "okay";
690};
691
692&usb2phy0_otg {
693 phy-supply = <&vcc5v0_usb_otg>;
694 status = "okay";
695};
696
697&usb2phy1 {
698 status = "okay";
699};
700
701&usb2phy1_host {
702 phy-supply = <&vcc5v0_usb30_host>;
703 status = "okay";
704};
705
706&usb2phy1_otg {
707 phy-supply = <&vcc5v0_usb30_host>;
708 status = "okay";
709};
710
711&vop {
712 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
713 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
714 status = "okay";
715};
716
717&vop_mmu {
718 status = "okay";
719};
720
721&vp0 {
722 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
723 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
724 remote-endpoint = <&hdmi_in_vp0>;
725 };
726};