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git01.mediatek.com / filogic / uboot / 6b642aca7f571e777924f50732f530fd94b03bfb / . / src / arm64 / qcom / sa8775p-ride.dtsi
blob: 2a6170623ea95ad34625b7eb3b729a3e1018f99a [file] [log] [blame]
Tom Rini6b642ac2024-10-01 12:20:28 -0600[diff] [blame^]1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11#include "sa8775p.dtsi"
12#include "sa8775p-pmics.dtsi"
13
14/ {
15 aliases {
16 ethernet0 = &ethernet0;
17 ethernet1 = &ethernet1;
18 i2c11 = &i2c11;
19 i2c18 = &i2c18;
20 serial0 = &uart10;
21 serial1 = &uart12;
22 serial2 = &uart17;
23 spi16 = &spi16;
24 ufshc1 = &ufs_mem_hc;
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30};
31
32&apps_rsc {
33 regulators-0 {
34 compatible = "qcom,pmm8654au-rpmh-regulators";
35 qcom,pmic-id = "a";
36
37 vreg_s4a: smps4 {
38 regulator-name = "vreg_s4a";
39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1816000>;
41 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
42 };
43
44 vreg_s5a: smps5 {
45 regulator-name = "vreg_s5a";
46 regulator-min-microvolt = <1850000>;
47 regulator-max-microvolt = <1996000>;
48 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
49 };
50
51 vreg_s9a: smps9 {
52 regulator-name = "vreg_s9a";
53 regulator-min-microvolt = <535000>;
54 regulator-max-microvolt = <1120000>;
55 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
56 };
57
58 vreg_l4a: ldo4 {
59 regulator-name = "vreg_l4a";
60 regulator-min-microvolt = <788000>;
61 regulator-max-microvolt = <1050000>;
62 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
63 regulator-allow-set-load;
64 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
65 RPMH_REGULATOR_MODE_HPM>;
66 };
67
68 vreg_l5a: ldo5 {
69 regulator-name = "vreg_l5a";
70 regulator-min-microvolt = <870000>;
71 regulator-max-microvolt = <950000>;
72 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
73 regulator-allow-set-load;
74 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
75 RPMH_REGULATOR_MODE_HPM>;
76 };
77
78 vreg_l6a: ldo6 {
79 regulator-name = "vreg_l6a";
80 regulator-min-microvolt = <870000>;
81 regulator-max-microvolt = <970000>;
82 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
83 regulator-allow-set-load;
84 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
85 RPMH_REGULATOR_MODE_HPM>;
86 };
87
88 vreg_l7a: ldo7 {
89 regulator-name = "vreg_l7a";
90 regulator-min-microvolt = <720000>;
91 regulator-max-microvolt = <950000>;
92 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
93 regulator-allow-set-load;
94 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
95 RPMH_REGULATOR_MODE_HPM>;
96 };
97
98 vreg_l8a: ldo8 {
99 regulator-name = "vreg_l8a";
100 regulator-min-microvolt = <2504000>;
101 regulator-max-microvolt = <3300000>;
102 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
103 regulator-allow-set-load;
104 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
105 RPMH_REGULATOR_MODE_HPM>;
106 };
107
108 vreg_l9a: ldo9 {
109 regulator-name = "vreg_l9a";
110 regulator-min-microvolt = <2970000>;
111 regulator-max-microvolt = <3544000>;
112 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
113 regulator-allow-set-load;
114 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
115 RPMH_REGULATOR_MODE_HPM>;
116 };
117 };
118
119 regulators-1 {
120 compatible = "qcom,pmm8654au-rpmh-regulators";
121 qcom,pmic-id = "c";
122
123 vreg_l1c: ldo1 {
124 regulator-name = "vreg_l1c";
125 regulator-min-microvolt = <1140000>;
126 regulator-max-microvolt = <1260000>;
127 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
128 regulator-allow-set-load;
129 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
130 RPMH_REGULATOR_MODE_HPM>;
131 };
132
133 vreg_l2c: ldo2 {
134 regulator-name = "vreg_l2c";
135 regulator-min-microvolt = <900000>;
136 regulator-max-microvolt = <1100000>;
137 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
138 regulator-allow-set-load;
139 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
140 RPMH_REGULATOR_MODE_HPM>;
141 };
142
143 vreg_l3c: ldo3 {
144 regulator-name = "vreg_l3c";
145 regulator-min-microvolt = <1100000>;
146 regulator-max-microvolt = <1300000>;
147 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
148 regulator-allow-set-load;
149 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
150 RPMH_REGULATOR_MODE_HPM>;
151 };
152
153 vreg_l4c: ldo4 {
154 regulator-name = "vreg_l4c";
155 regulator-min-microvolt = <1200000>;
156 regulator-max-microvolt = <1200000>;
157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
158 /*
159 * FIXME: This should have regulator-allow-set-load but
160 * we're getting an over-current fault from the PMIC
161 * when switching to LPM.
162 */
163 };
164
165 vreg_l5c: ldo5 {
166 regulator-name = "vreg_l5c";
167 regulator-min-microvolt = <1100000>;
168 regulator-max-microvolt = <1300000>;
169 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
170 regulator-allow-set-load;
171 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
172 RPMH_REGULATOR_MODE_HPM>;
173 };
174
175 vreg_l6c: ldo6 {
176 regulator-name = "vreg_l6c";
177 regulator-min-microvolt = <1620000>;
178 regulator-max-microvolt = <1980000>;
179 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
180 regulator-allow-set-load;
181 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
182 RPMH_REGULATOR_MODE_HPM>;
183 };
184
185 vreg_l7c: ldo7 {
186 regulator-name = "vreg_l7c";
187 regulator-min-microvolt = <1620000>;
188 regulator-max-microvolt = <2000000>;
189 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190 regulator-allow-set-load;
191 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
192 RPMH_REGULATOR_MODE_HPM>;
193 };
194
195 vreg_l8c: ldo8 {
196 regulator-name = "vreg_l8c";
197 regulator-min-microvolt = <2400000>;
198 regulator-max-microvolt = <3300000>;
199 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
200 regulator-allow-set-load;
201 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
202 RPMH_REGULATOR_MODE_HPM>;
203 };
204
205 vreg_l9c: ldo9 {
206 regulator-name = "vreg_l9c";
207 regulator-min-microvolt = <1650000>;
208 regulator-max-microvolt = <2700000>;
209 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
210 regulator-allow-set-load;
211 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
212 RPMH_REGULATOR_MODE_HPM>;
213 };
214 };
215
216 regulators-2 {
217 compatible = "qcom,pmm8654au-rpmh-regulators";
218 qcom,pmic-id = "e";
219
220 vreg_s4e: smps4 {
221 regulator-name = "vreg_s4e";
222 regulator-min-microvolt = <970000>;
223 regulator-max-microvolt = <1520000>;
224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225 };
226
227 vreg_s7e: smps7 {
228 regulator-name = "vreg_s7e";
229 regulator-min-microvolt = <1010000>;
230 regulator-max-microvolt = <1170000>;
231 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
232 };
233
234 vreg_s9e: smps9 {
235 regulator-name = "vreg_s9e";
236 regulator-min-microvolt = <300000>;
237 regulator-max-microvolt = <570000>;
238 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
239 };
240
241 vreg_l6e: ldo6 {
242 regulator-name = "vreg_l6e";
243 regulator-min-microvolt = <1280000>;
244 regulator-max-microvolt = <1450000>;
245 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
246 regulator-allow-set-load;
247 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
248 RPMH_REGULATOR_MODE_HPM>;
249 };
250
251 vreg_l8e: ldo8 {
252 regulator-name = "vreg_l8e";
253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvolt = <1950000>;
255 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 regulator-allow-set-load;
257 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
258 RPMH_REGULATOR_MODE_HPM>;
259 };
260 };
261};
262
263&ethernet0 {
264 phy-handle = <&sgmii_phy0>;
265
266 pinctrl-0 = <&ethernet0_default>;
267 pinctrl-names = "default";
268
269 snps,mtl-rx-config = <&mtl_rx_setup>;
270 snps,mtl-tx-config = <&mtl_tx_setup>;
271 snps,ps-speed = <1000>;
272
273 status = "okay";
274
275 mdio: mdio {
276 compatible = "snps,dwmac-mdio";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 };
280
281 mtl_rx_setup: rx-queues-config {
282 snps,rx-queues-to-use = <4>;
283 snps,rx-sched-sp;
284
285 queue0 {
286 snps,dcb-algorithm;
287 snps,map-to-dma-channel = <0x0>;
288 snps,route-up;
289 snps,priority = <0x1>;
290 };
291
292 queue1 {
293 snps,dcb-algorithm;
294 snps,map-to-dma-channel = <0x1>;
295 snps,route-ptp;
296 };
297
298 queue2 {
299 snps,avb-algorithm;
300 snps,map-to-dma-channel = <0x2>;
301 snps,route-avcp;
302 };
303
304 queue3 {
305 snps,avb-algorithm;
306 snps,map-to-dma-channel = <0x3>;
307 snps,priority = <0xc>;
308 };
309 };
310
311 mtl_tx_setup: tx-queues-config {
312 snps,tx-queues-to-use = <4>;
313 snps,tx-sched-sp;
314
315 queue0 {
316 snps,dcb-algorithm;
317 };
318
319 queue1 {
320 snps,dcb-algorithm;
321 };
322
323 queue2 {
324 snps,avb-algorithm;
325 snps,send_slope = <0x1000>;
326 snps,idle_slope = <0x1000>;
327 snps,high_credit = <0x3e800>;
328 snps,low_credit = <0xffc18000>;
329 };
330
331 queue3 {
332 snps,avb-algorithm;
333 snps,send_slope = <0x1000>;
334 snps,idle_slope = <0x1000>;
335 snps,high_credit = <0x3e800>;
336 snps,low_credit = <0xffc18000>;
337 };
338 };
339};
340
341&ethernet1 {
342 phy-handle = <&sgmii_phy1>;
343
344 snps,mtl-rx-config = <&mtl_rx_setup1>;
345 snps,mtl-tx-config = <&mtl_tx_setup1>;
346 snps,ps-speed = <1000>;
347
348 status = "okay";
349
350 mtl_rx_setup1: rx-queues-config {
351 snps,rx-queues-to-use = <4>;
352 snps,rx-sched-sp;
353
354 queue0 {
355 snps,dcb-algorithm;
356 snps,map-to-dma-channel = <0x0>;
357 snps,route-up;
358 snps,priority = <0x1>;
359 };
360
361 queue1 {
362 snps,dcb-algorithm;
363 snps,map-to-dma-channel = <0x1>;
364 snps,route-ptp;
365 };
366
367 queue2 {
368 snps,avb-algorithm;
369 snps,map-to-dma-channel = <0x2>;
370 snps,route-avcp;
371 };
372
373 queue3 {
374 snps,avb-algorithm;
375 snps,map-to-dma-channel = <0x3>;
376 snps,priority = <0xc>;
377 };
378 };
379
380 mtl_tx_setup1: tx-queues-config {
381 snps,tx-queues-to-use = <4>;
382 snps,tx-sched-sp;
383
384 queue0 {
385 snps,dcb-algorithm;
386 };
387
388 queue1 {
389 snps,dcb-algorithm;
390 };
391
392 queue2 {
393 snps,avb-algorithm;
394 snps,send_slope = <0x1000>;
395 snps,idle_slope = <0x1000>;
396 snps,high_credit = <0x3e800>;
397 snps,low_credit = <0xffc18000>;
398 };
399
400 queue3 {
401 snps,avb-algorithm;
402 snps,send_slope = <0x1000>;
403 snps,idle_slope = <0x1000>;
404 snps,high_credit = <0x3e800>;
405 snps,low_credit = <0xffc18000>;
406 };
407 };
408};
409
410&i2c11 {
411 clock-frequency = <400000>;
412 pinctrl-0 = <&qup_i2c11_default>;
413 pinctrl-names = "default";
414 status = "okay";
415};
416
417&i2c18 {
418 clock-frequency = <400000>;
419 pinctrl-0 = <&qup_i2c18_default>;
420 pinctrl-names = "default";
421 status = "okay";
422};
423
424&pmm8654au_0_gpios {
425 gpio-line-names = "DS_EN",
426 "POFF_COMPLETE",
427 "UFS0_VER_ID",
428 "FAST_POFF",
429 "DBU1_PON_DONE",
430 "AOSS_SLEEP",
431 "CAM_DES0_EN",
432 "CAM_DES1_EN",
433 "CAM_DES2_EN",
434 "CAM_DES3_EN",
435 "UEFI",
436 "ANALOG_PON_OPT";
437};
438
439&pmm8654au_0_pon_resin {
440 linux,code = <KEY_VOLUMEDOWN>;
441 status = "okay";
442};
443
444&pmm8654au_1_gpios {
445 gpio-line-names = "PMIC_C_ID0",
446 "PMIC_C_ID1",
447 "UFS1_VER_ID",
448 "IPA_PWR",
449 "",
450 "WLAN_DBU4_EN",
451 "WLAN_EN",
452 "BT_EN",
453 "USB2_PWR_EN",
454 "USB2_FAULT";
455
456 usb2_en_state: usb2-en-state {
457 pins = "gpio9";
458 function = "normal";
459 output-high;
460 power-source = <0>;
461 };
462};
463
464&pmm8654au_2_gpios {
465 gpio-line-names = "PMIC_E_ID0",
466 "PMIC_E_ID1",
467 "USB0_PWR_EN",
468 "USB0_FAULT",
469 "SENSOR_IRQ_1",
470 "SENSOR_IRQ_2",
471 "SENSOR_RST",
472 "SGMIIO0_RST",
473 "SGMIIO1_RST",
474 "USB1_PWR_ENABLE",
475 "USB1_FAULT",
476 "VMON_SPX8";
477
478 usb0_en_state: usb0-en-state {
479 pins = "gpio3";
480 function = "normal";
481 output-high;
482 power-source = <0>;
483 };
484
485 usb1_en_state: usb1-en-state {
486 pins = "gpio10";
487 function = "normal";
488 output-high;
489 power-source = <0>;
490 };
491};
492
493&pmm8654au_3_gpios {
494 gpio-line-names = "PMIC_G_ID0",
495 "PMIC_G_ID1",
496 "GNSS_RST",
497 "GNSS_EN",
498 "GNSS_BOOT_MODE";
499};
500
501&qupv3_id_1 {
502 status = "okay";
503};
504
505&qupv3_id_2 {
506 status = "okay";
507};
508
509&serdes0 {
510 phy-supply = <&vreg_l5a>;
511 status = "okay";
512};
513
514&serdes1 {
515 phy-supply = <&vreg_l5a>;
516 status = "okay";
517};
518
519&sleep_clk {
520 clock-frequency = <32764>;
521};
522
523&spi16 {
524 pinctrl-0 = <&qup_spi16_default>;
525 pinctrl-names = "default";
526 status = "okay";
527};
528
529&tlmm {
530 ethernet0_default: ethernet0-default-state {
531 ethernet0_mdc: ethernet0-mdc-pins {
532 pins = "gpio8";
533 function = "emac0_mdc";
534 drive-strength = <16>;
535 bias-pull-up;
536 };
537
538 ethernet0_mdio: ethernet0-mdio-pins {
539 pins = "gpio9";
540 function = "emac0_mdio";
541 drive-strength = <16>;
542 bias-pull-up;
543 };
544 };
545
546 qup_uart10_default: qup-uart10-state {
547 pins = "gpio46", "gpio47";
548 function = "qup1_se3";
549 };
550
551 qup_spi16_default: qup-spi16-state {
552 pins = "gpio86", "gpio87", "gpio88", "gpio89";
553 function = "qup2_se2";
554 drive-strength = <6>;
555 bias-disable;
556 };
557
558 qup_i2c11_default: qup-i2c11-state {
559 pins = "gpio48", "gpio49";
560 function = "qup1_se4";
561 drive-strength = <2>;
562 bias-pull-up;
563 };
564
565 qup_i2c18_default: qup-i2c18-state {
566 pins = "gpio95", "gpio96";
567 function = "qup2_se4";
568 drive-strength = <2>;
569 bias-pull-up;
570 };
571
572 qup_uart12_default: qup-uart12-state {
573 qup_uart12_cts: qup-uart12-cts-pins {
574 pins = "gpio52";
575 function = "qup1_se5";
576 bias-disable;
577 };
578
579 qup_uart12_rts: qup-uart12-rts-pins {
580 pins = "gpio53";
581 function = "qup1_se5";
582 bias-pull-down;
583 };
584
585 qup_uart12_tx: qup-uart12-tx-pins {
586 pins = "gpio54";
587 function = "qup1_se5";
588 bias-pull-up;
589 };
590
591 qup_uart12_rx: qup-uart12-rx-pins {
592 pins = "gpio55";
593 function = "qup1_se5";
594 bias-pull-down;
595 };
596 };
597
598 qup_uart17_default: qup-uart17-state {
599 qup_uart17_cts: qup-uart17-cts-pins {
600 pins = "gpio91";
601 function = "qup2_se3";
602 bias-disable;
603 };
604
605 qup_uart17_rts: qup0-uart17-rts-pins {
606 pins = "gpio92";
607 function = "qup2_se3";
608 bias-pull-down;
609 };
610
611 qup_uart17_tx: qup0-uart17-tx-pins {
612 pins = "gpio93";
613 function = "qup2_se3";
614 bias-pull-up;
615 };
616
617 qup_uart17_rx: qup0-uart17-rx-pins {
618 pins = "gpio94";
619 function = "qup2_se3";
620 bias-pull-down;
621 };
622 };
623
624 pcie0_default_state: pcie0-default-state {
625 perst-pins {
626 pins = "gpio2";
627 function = "gpio";
628 drive-strength = <2>;
629 bias-pull-down;
630 };
631
632 clkreq-pins {
633 pins = "gpio1";
634 function = "pcie0_clkreq";
635 drive-strength = <2>;
636 bias-pull-up;
637 };
638
639 wake-pins {
640 pins = "gpio0";
641 function = "gpio";
642 drive-strength = <2>;
643 bias-pull-up;
644 };
645 };
646
647 pcie1_default_state: pcie1-default-state {
648 perst-pins {
649 pins = "gpio4";
650 function = "gpio";
651 drive-strength = <2>;
652 bias-pull-down;
653 };
654
655 clkreq-pins {
656 pins = "gpio3";
657 function = "pcie1_clkreq";
658 drive-strength = <2>;
659 bias-pull-up;
660 };
661
662 wake-pins {
663 pins = "gpio5";
664 function = "gpio";
665 drive-strength = <2>;
666 bias-pull-up;
667 };
668 };
669};
670
671&pcie0 {
672 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
673 wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
674
675 pinctrl-names = "default";
676 pinctrl-0 = <&pcie0_default_state>;
677
678 status = "okay";
679};
680
681&pcie1 {
682 perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
683 wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
684
685 pinctrl-names = "default";
686 pinctrl-0 = <&pcie1_default_state>;
687
688 status = "okay";
689};
690
691&pcie0_phy {
692 vdda-phy-supply = <&vreg_l5a>;
693 vdda-pll-supply = <&vreg_l1c>;
694
695 status = "okay";
696};
697
698&pcie1_phy {
699 vdda-phy-supply = <&vreg_l5a>;
700 vdda-pll-supply = <&vreg_l1c>;
701
702 status = "okay";
703};
704
705&uart10 {
706 compatible = "qcom,geni-debug-uart";
707 pinctrl-0 = <&qup_uart10_default>;
708 pinctrl-names = "default";
709 status = "okay";
710};
711
712&uart12 {
713 pinctrl-0 = <&qup_uart12_default>;
714 pinctrl-names = "default";
715 status = "okay";
716};
717
718&uart17 {
719 pinctrl-0 = <&qup_uart17_default>;
720 pinctrl-names = "default";
721 status = "okay";
722};
723
724&ufs_mem_hc {
725 reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
726 vcc-supply = <&vreg_l8a>;
727 vcc-max-microamp = <1100000>;
728 vccq-supply = <&vreg_l4c>;
729 vccq-max-microamp = <1200000>;
730
731 status = "okay";
732};
733
734&ufs_mem_phy {
735 vdda-phy-supply = <&vreg_l4a>;
736 vdda-pll-supply = <&vreg_l1c>;
737
738 status = "okay";
739};
740
741&usb_0 {
742 pinctrl-names = "default";
743 pinctrl-0 = <&usb0_en_state>;
744
745 status = "okay";
746};
747
748&usb_0_dwc3 {
749 dr_mode = "peripheral";
750};
751
752&usb_0_hsphy {
753 vdda-pll-supply = <&vreg_l7a>;
754 vdda18-supply = <&vreg_l6c>;
755 vdda33-supply = <&vreg_l9a>;
756
757 status = "okay";
758};
759
760&usb_0_qmpphy {
761 vdda-phy-supply = <&vreg_l1c>;
762 vdda-pll-supply = <&vreg_l7a>;
763
764 status = "okay";
765};
766
767&usb_1 {
768 pinctrl-names = "default";
769 pinctrl-0 = <&usb1_en_state>;
770
771 status = "okay";
772};
773
774&usb_1_dwc3 {
775 dr_mode = "host";
776};
777
778&usb_1_hsphy {
779 vdda-pll-supply = <&vreg_l7a>;
780 vdda18-supply = <&vreg_l6c>;
781 vdda33-supply = <&vreg_l9a>;
782
783 status = "okay";
784};
785
786&usb_1_qmpphy {
787 vdda-phy-supply = <&vreg_l1c>;
788 vdda-pll-supply = <&vreg_l7a>;
789
790 status = "okay";
791};
792
793&usb_2 {
794 pinctrl-names = "default";
795 pinctrl-0 = <&usb2_en_state>;
796
797 status = "okay";
798};
799
800&usb_2_dwc3 {
801 dr_mode = "host";
802};
803
804&usb_2_hsphy {
805 vdda-pll-supply = <&vreg_l7a>;
806 vdda18-supply = <&vreg_l6c>;
807 vdda33-supply = <&vreg_l9a>;
808
809 status = "okay";
810};
811
812&xo_board_clk {
813 clock-frequency = <38400000>;
814};