Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 6b642aca7f571e777924f50732f530fd94b03bfb / . / Bindings / media / i2c / ti,ds90ub960.yaml
blob: 0b71e6f911a8835eb70ccf832888964288a6cac6 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/i2c/ti,ds90ub960.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs
8
9maintainers:
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
11
12description:
13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO
14 forwarding.
15
16allOf:
17 - $ref: /schemas/i2c/i2c-atr.yaml#
18
19properties:
20 compatible:
21 enum:
22 - ti,ds90ub960-q1
23 - ti,ds90ub9702-q1
24
25 reg:
26 maxItems: 1
27
28 clocks:
29 maxItems: 1
30 description:
31 Reference clock connected to the REFCLK pin.
32
33 clock-names:
34 items:
35 - const: refclk
36
37 powerdown-gpios:
38 maxItems: 1
39 description:
40 Specifier for the GPIO connected to the PDB pin.
41
42 i2c-alias-pool:
43 minItems: 1
44 maxItems: 32
45
46 links:
47 type: object
48 additionalProperties: false
49
50 properties:
51 '#address-cells':
52 const: 1
53
54 '#size-cells':
55 const: 0
56
57 ti,manual-strobe:
58 type: boolean
59 description:
60 Enable manual strobe position and EQ level
61
62 patternProperties:
63 '^link@[0-3]$':
64 type: object
65 additionalProperties: false
66 properties:
67 reg:
68 description: The link number
69 maxItems: 1
70
71 i2c-alias:
72 $ref: /schemas/types.yaml#/definitions/uint32
73 description:
74 The I2C address used for the serializer. Transactions to this
75 address on the I2C bus where the deserializer resides are
76 forwarded to the serializer.
77
78 ti,rx-mode:
79 $ref: /schemas/types.yaml#/definitions/uint32
80 enum:
81 - 0 # RAW10
82 - 1 # RAW12 HF
83 - 2 # RAW12 LF
84 - 3 # CSI2 SYNC
85 - 4 # CSI2 NON-SYNC
86 description:
87 FPD-Link Input Mode. This should reflect the hardware and the
88 default mode of the connected device.
89
90 ti,cdr-mode:
91 $ref: /schemas/types.yaml#/definitions/uint32
92 enum:
93 - 0 # FPD-Link III
94 - 1 # FPD-Link IV
95 description:
96 FPD-Link CDR Mode. This should reflect the hardware and the
97 default mode of the connected device.
98
99 ti,strobe-pos:
100 $ref: /schemas/types.yaml#/definitions/int32
101 minimum: -13
102 maximum: 13
103 description: Manual strobe position
104
105 ti,eq-level:
106 $ref: /schemas/types.yaml#/definitions/uint32
107 maximum: 14
108 description: Manual EQ level
109
110 serializer:
111 type: object
112 description: FPD-Link Serializer node
113
114 required:
115 - reg
116 - i2c-alias
117 - ti,rx-mode
118 - serializer
119
120 ports:
121 $ref: /schemas/graph.yaml#/properties/ports
122
123 properties:
124 port@0:
125 $ref: /schemas/graph.yaml#/$defs/port-base
126 unevaluatedProperties: false
127 description: FPD-Link input 0
128
129 properties:
130 endpoint:
131 $ref: /schemas/media/video-interfaces.yaml#
132 unevaluatedProperties: false
133 description:
134 Endpoint for FPD-Link port. If the RX mode for this port is RAW,
135 hsync-active and vsync-active must be defined.
136
137 port@1:
138 $ref: /schemas/graph.yaml#/$defs/port-base
139 unevaluatedProperties: false
140 description: FPD-Link input 1
141
142 properties:
143 endpoint:
144 $ref: /schemas/media/video-interfaces.yaml#
145 unevaluatedProperties: false
146 description:
147 Endpoint for FPD-Link port. If the RX mode for this port is RAW,
148 hsync-active and vsync-active must be defined.
149
150 port@2:
151 $ref: /schemas/graph.yaml#/$defs/port-base
152 unevaluatedProperties: false
153 description: FPD-Link input 2
154
155 properties:
156 endpoint:
157 $ref: /schemas/media/video-interfaces.yaml#
158 unevaluatedProperties: false
159 description:
160 Endpoint for FPD-Link port. If the RX mode for this port is RAW,
161 hsync-active and vsync-active must be defined.
162
163 port@3:
164 $ref: /schemas/graph.yaml#/$defs/port-base
165 unevaluatedProperties: false
166 description: FPD-Link input 3
167
168 properties:
169 endpoint:
170 $ref: /schemas/media/video-interfaces.yaml#
171 unevaluatedProperties: false
172 description:
173 Endpoint for FPD-Link port. If the RX mode for this port is RAW,
174 hsync-active and vsync-active must be defined.
175
176 port@4:
177 $ref: /schemas/graph.yaml#/$defs/port-base
178 unevaluatedProperties: false
179 description: CSI-2 Output 0
180
181 properties:
182 endpoint:
183 $ref: /schemas/media/video-interfaces.yaml#
184 unevaluatedProperties: false
185
186 properties:
187 data-lanes:
188 minItems: 1
189 maxItems: 4
190 link-frequencies:
191 maxItems: 1
192
193 required:
194 - data-lanes
195 - link-frequencies
196
197 port@5:
198 $ref: /schemas/graph.yaml#/$defs/port-base
199 unevaluatedProperties: false
200 description: CSI-2 Output 1
201
202 properties:
203 endpoint:
204 $ref: /schemas/media/video-interfaces.yaml#
205 unevaluatedProperties: false
206
207 properties:
208 data-lanes:
209 minItems: 1
210 maxItems: 4
211 link-frequencies:
212 maxItems: 1
213
214 required:
215 - data-lanes
216 - link-frequencies
217
218 required:
219 - port@0
220 - port@1
221 - port@2
222 - port@3
223 - port@4
224 - port@5
225
226required:
227 - compatible
228 - reg
229 - clocks
230 - clock-names
231 - ports
232
233unevaluatedProperties: false
234
235examples:
236 - |
237 #include <dt-bindings/gpio/gpio.h>
238
239 i2c {
240 clock-frequency = <400000>;
241 #address-cells = <1>;
242 #size-cells = <0>;
243
244 deser@3d {
245 compatible = "ti,ds90ub960-q1";
246 reg = <0x3d>;
247
248 clock-names = "refclk";
249 clocks = <&fixed_clock>;
250
251 powerdown-gpios = <&pca9555 7 GPIO_ACTIVE_LOW>;
252
253 i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
254
255 ports {
256 #address-cells = <1>;
257 #size-cells = <0>;
258
259 /* Port 0, Camera 0 */
260 port@0 {
261 reg = <0>;
262
263 ub960_fpd3_1_in: endpoint {
264 remote-endpoint = <&ub953_1_out>;
265 };
266 };
267
268 /* Port 1, Camera 1 */
269 port@1 {
270 reg = <1>;
271
272 ub960_fpd3_2_in: endpoint {
273 remote-endpoint = <&ub913_2_out>;
274 hsync-active = <0>;
275 vsync-active = <1>;
276 };
277 };
278
279 /* Port 2, unconnected */
280 port@2 {
281 reg = <2>;
282 };
283
284 /* Port 3, unconnected */
285 port@3 {
286 reg = <3>;
287 };
288
289 /* Port 4, CSI-2 TX */
290 port@4 {
291 reg = <4>;
292 ds90ub960_0_csi_out: endpoint {
293 data-lanes = <1 2 3 4>;
294 link-frequencies = /bits/ 64 <800000000>;
295 remote-endpoint = <&csi2_phy0>;
296 };
297 };
298
299 /* Port 5, unconnected */
300 port@5 {
301 reg = <5>;
302 };
303 };
304
305 links {
306 #address-cells = <1>;
307 #size-cells = <0>;
308
309 /* Link 0 has DS90UB953 serializer and IMX274 sensor */
310
311 link@0 {
312 reg = <0>;
313 i2c-alias = <0x44>;
314
315 ti,rx-mode = <3>;
316
317 serializer1: serializer {
318 compatible = "ti,ds90ub953-q1";
319
320 gpio-controller;
321 #gpio-cells = <2>;
322
323 #clock-cells = <0>;
324
325 ports {
326 #address-cells = <1>;
327 #size-cells = <0>;
328
329 port@0 {
330 reg = <0>;
331 ub953_1_in: endpoint {
332 data-lanes = <1 2 3 4>;
333 remote-endpoint = <&sensor_1_out>;
334 };
335 };
336
337 port@1 {
338 reg = <1>;
339
340 ub953_1_out: endpoint {
341 remote-endpoint = <&ub960_fpd3_1_in>;
342 };
343 };
344 };
345
346 i2c {
347 #address-cells = <1>;
348 #size-cells = <0>;
349
350 sensor@1a {
351 compatible = "sony,imx274";
352 reg = <0x1a>;
353
354 reset-gpios = <&serializer1 0 GPIO_ACTIVE_LOW>;
355
356 port {
357 sensor_1_out: endpoint {
358 remote-endpoint = <&ub953_1_in>;
359 };
360 };
361 };
362 };
363 };
364 }; /* End of link@0 */
365
366 /* Link 1 has DS90UB913 serializer and MT9V111 sensor */
367
368 link@1 {
369 reg = <1>;
370 i2c-alias = <0x45>;
371
372 ti,rx-mode = <0>;
373
374 serializer2: serializer {
375 compatible = "ti,ds90ub913a-q1";
376
377 gpio-controller;
378 #gpio-cells = <2>;
379
380 clocks = <&clk_cam_48M>;
381 clock-names = "clkin";
382
383 #clock-cells = <0>;
384
385 ports {
386 #address-cells = <1>;
387 #size-cells = <0>;
388
389 port@0 {
390 reg = <0>;
391 ub913_2_in: endpoint {
392 remote-endpoint = <&sensor_2_out>;
393 pclk-sample = <1>;
394 };
395 };
396
397 port@1 {
398 reg = <1>;
399
400 ub913_2_out: endpoint {
401 remote-endpoint = <&ub960_fpd3_2_in>;
402 };
403 };
404 };
405
406 i2c {
407 #address-cells = <1>;
408 #size-cells = <0>;
409
410 sensor@48 {
411 compatible = "aptina,mt9v111";
412 reg = <0x48>;
413
414 clocks = <&serializer2>;
415
416 port {
417 sensor_2_out: endpoint {
418 remote-endpoint = <&ub913_2_in>;
419 };
420 };
421 };
422 };
423 };
424 }; /* End of link@1 */
425 };
426 };
427 };
428...