| Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock-legacy.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Legacy Clock Block on Freescale QorIQ Platforms |
| 8 | |
| 9 | maintainers: |
| 10 | - Frank Li <Frank.Li@nxp.com> |
| 11 | |
| 12 | description: | |
| 13 | These nodes are deprecated. Kernels should continue to support |
| 14 | device trees with these nodes, but new device trees should not use them. |
| 15 | |
| 16 | Most of the bindings are from the common clock binding[1]. |
| 17 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 18 | |
| 19 | properties: |
| 20 | compatible: |
| 21 | enum: |
| 22 | - fsl,qoriq-core-pll-1.0 |
| 23 | - fsl,qoriq-core-pll-2.0 |
| 24 | - fsl,qoriq-core-mux-1.0 |
| 25 | - fsl,qoriq-core-mux-2.0 |
| 26 | - fsl,qoriq-sysclk-1.0 |
| 27 | - fsl,qoriq-sysclk-2.0 |
| 28 | - fsl,qoriq-platform-pll-1.0 |
| 29 | - fsl,qoriq-platform-pll-2.0 |
| 30 | |
| 31 | reg: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | clocks: |
| 35 | minItems: 1 |
| 36 | maxItems: 4 |
| 37 | |
| 38 | clock-names: |
| 39 | minItems: 1 |
| 40 | maxItems: 4 |
| 41 | |
| 42 | clock-output-names: |
| 43 | minItems: 1 |
| 44 | maxItems: 8 |
| 45 | |
| 46 | '#clock-cells': |
| 47 | minimum: 0 |
| 48 | maximum: 1 |
| 49 | |
| 50 | required: |
| 51 | - compatible |
| 52 | - '#clock-cells' |
| 53 | |
| 54 | additionalProperties: false |
| 55 | |
| 56 | allOf: |
| 57 | - if: |
| 58 | properties: |
| 59 | compatible: |
| 60 | contains: |
| 61 | enum: |
| 62 | - fsl,qoriq-sysclk-1.0 |
| 63 | - fsl,qoriq-sysclk-2.0 |
| 64 | then: |
| 65 | properties: |
| 66 | '#clock-cells': |
| 67 | const: 0 |
| 68 | |
| 69 | - if: |
| 70 | properties: |
| 71 | compatible: |
| 72 | contains: |
| 73 | enum: |
| 74 | - fsl,qoriq-core-pll-1.0 |
| 75 | - fsl,qoriq-core-pll-2.0 |
| 76 | then: |
| 77 | properties: |
| 78 | '#clock-cells': |
| 79 | const: 1 |
| 80 | description: | |
| 81 | * 0 - equal to the PLL frequency |
| 82 | * 1 - equal to the PLL frequency divided by 2 |
| 83 | * 2 - equal to the PLL frequency divided by 4 |
| 84 | |