blob: 4f4374a74bae012bf121a3532278e856fa44da6b [file] [log] [blame]
Tom Warrena3e280b2011-01-27 10:58:07 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __TEGRA2_COMMON_H
25#define __TEGRA2_COMMON_H
26#include <asm/sizes.h>
27
28/*
29 * High Level Configuration Options
30 */
31#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
32#define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */
33#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
34#define CONFIG_L2_OFF /* No L2 cache */
35
36#include <asm/arch/tegra2.h> /* get chip and board defs */
37
38/*
39 * Display CPU and Board information
40 */
41#define CONFIG_DISPLAY_CPUINFO
42#define CONFIG_DISPLAY_BOARDINFO
43
44#define CONFIG_SKIP_RELOCATE_UBOOT
45#define CONFIG_SKIP_LOWLEVEL_INIT
46
47#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48
49/* Environment */
50#define CONFIG_ENV_IS_NOWHERE
51#define CONFIG_ENV_SIZE 0x20000 /* Total Size Environment */
52
53/*
54 * Size of malloc() pool
55 */
56#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
57
58/*
59 * PllX Configuration
60 */
61#define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
62
63/*
64 * NS16550 Configuration
65 */
66#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
67
68#define CONFIG_SYS_NS16550
69#define CONFIG_SYS_NS16550_SERIAL
70#define CONFIG_SYS_NS16550_REG_SIZE (-4)
71#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
72
73/*
74 * select serial console configuration
75 */
76#define CONFIG_CONS_INDEX 1
77
78/* allow to overwrite serial and ethaddr */
79#define CONFIG_ENV_OVERWRITE
80#define CONFIG_BAUDRATE 115200
81#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
82 115200}
83
84/* include default commands */
85#include <config_cmd_default.h>
86
87/* remove unused commands */
88#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
89#undef CONFIG_CMD_FPGA /* FPGA configuration support */
90#undef CONFIG_CMD_IMI
91#undef CONFIG_CMD_IMLS
92#undef CONFIG_CMD_NFS /* NFS support */
93#undef CONFIG_CMD_NET /* network support */
94
95/* turn on command-line edit/hist/auto */
96#define CONFIG_CMDLINE_EDITING
97#define CONFIG_COMMAND_HISTORY
98#define CONFIG_AUTOCOMPLETE
99
100#define CONFIG_SYS_NO_FLASH
101
102/* Environment information */
103#define CONFIG_EXTRA_ENV_SETTINGS \
104 "console=ttyS0,115200n8\0" \
105 "mem=" TEGRA2_SYSMEM "\0" \
106 "smpflag=smp\0" \
107
108#define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
109#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
110
111/*
112 * Miscellaneous configurable options
113 */
114#define CONFIG_SYS_LONGHELP /* undef to save memory */
115#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
116#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
117#define CONFIG_SYS_PROMPT V_PROMPT
118/*
119 * Increasing the size of the IO buffer as default nfsargs size is more
120 * than 256 and so it is not possible to edit it
121 */
122#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
123/* Print Buffer Size */
124#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
125 sizeof(CONFIG_SYS_PROMPT) + 16)
126#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
127/* Boot Argument Buffer Size */
128#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
129
130#define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000)
131#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
132
133#define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
134#define CONFIG_SYS_HZ 1000
135
136/*-----------------------------------------------------------------------
137 * Stack sizes
138 *
139 * The stack sizes are set up in start.S using the settings below
140 */
141#define CONFIG_STACKBASE 0x2800000 /* 40MB */
142#define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/
143
144/*-----------------------------------------------------------------------
145 * Physical Memory Map
146 */
147#define CONFIG_NR_DRAM_BANKS 1
148#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
149#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
150
151#define CONFIG_SYS_TEXT_BASE 0x00E08000
152#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
153
154#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
155#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
156#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
157 CONFIG_SYS_INIT_RAM_SIZE - \
158 GENERATED_GBL_DATA_SIZE)
159
160#endif /* __TEGRA2_COMMON_H */