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git01.mediatek.com / filogic / uboot / 6ad29f7d3d1232196d64d807437f67b530e9b19c / . / configs / ls2080aqds_nand_defconfig
blob: d6c3fd1a5a7f73c174caa3fb7b6f57d658aff4b9 [file] [log] [blame]
Scott Wood8e728cd2015-03-24 13:25:02 -0700[diff] [blame]1CONFIG_ARM=y
Tom Rini3eea5772020-05-08 09:08:39 -0400[diff] [blame]2CONFIG_GIC_V3_ITS=y
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +0530[diff] [blame]3CONFIG_TARGET_LS2080AQDS=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x80400000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]5CONFIG_SYS_MALLOC_LEN=0x202000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=3
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_SIZE=0x2000
10CONFIG_ENV_OFFSET=0xE0000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]12CONFIG_SPL_TEXT_BASE=0x1800a000
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]13CONFIG_FSL_USE_PCA9547_MUX=y
Tom Rinie24547a2022-03-30 18:07:32 -0400[diff] [blame]14CONFIG_FSL_QIXIS=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]15CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]16CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]17CONFIG_SPL=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]18CONFIG_AHCI=y
Alper Nebi Yasak2beb0f42022-01-29 18:25:30 +0300[diff] [blame]19CONFIG_REMAKE_ELF=y
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]20CONFIG_MP=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]21CONFIG_FIT=y
22CONFIG_FIT_VERBOSE=y
23CONFIG_OF_BOARD_SETUP=y
24CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini8c70baa2021-12-14 13:36:40 -0500[diff] [blame]25CONFIG_DYNAMIC_SYS_CLK_FREQ=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]26CONFIG_NAND_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]27CONFIG_BOOTDELAY=10
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]28CONFIG_USE_BOOTARGS=y
29CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]30CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load"
Tom Rini356c6742022-03-18 08:38:20 -0400[diff] [blame]31CONFIG_RESET_PHY_R=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]32CONFIG_SPL_ENV_SUPPORT=y
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]33CONFIG_SPL_I2C=y
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]34CONFIG_SPL_MPC8XXX_INIT_DDR=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]35CONFIG_SPL_NAND_SUPPORT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_GREPENV=y
Simon Glass4590d4e2017-05-17 03:25:10 -0600[diff] [blame]37CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]38CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
39CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]40CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]41CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]43CONFIG_CMD_NAND=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]44CONFIG_CMD_PCI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]45CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]46# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]47CONFIG_CMD_CACHE=y
Chris Packham3e257df2017-04-29 15:20:28 +1200[diff] [blame]48CONFIG_CMD_DATE=y
Patrick Delaunay21d3bce2017-01-27 11:00:38 +0100[diff] [blame]49# CONFIG_ISO_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]50# CONFIG_SPL_EFI_PARTITION is not set
Tom Rinib937b2e2016-06-13 09:45:14 -0400[diff] [blame]51CONFIG_OF_CONTROL=y
52CONFIG_OF_EMBED=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]53CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]54CONFIG_ENV_IS_IN_NAND=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]55CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]56CONFIG_USE_ETHPRIME=y
57CONFIG_ETHPRIME="DPMAC1@xgmii"
Prabhakar Kushwahafe9e26d2015-10-07 16:30:12 +0530[diff] [blame]58CONFIG_NET_RANDOM_ETHADDR=y
Tom Rinib937b2e2016-06-13 09:45:14 -0400[diff] [blame]59CONFIG_DM=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]60CONFIG_SATA=y
Peng Ma1c4bf2f2019-01-30 19:17:44 +0800[diff] [blame]61CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]62CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]63CONFIG_DYNAMIC_DDR_CLK_FREQ=y
Tom Rini3210bdc2022-03-30 18:07:31 -0400[diff] [blame]64CONFIG_DIMM_SLOTS_PER_CTLR=2
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]65CONFIG_DDR_ECC=y
66CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]67CONFIG_SYS_I2C_LEGACY=y
Tom Rini714482a2021-08-18 23:12:25 -0400[diff] [blame]68CONFIG_SYS_I2C_EARLY_INIT=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]69CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]70CONFIG_FSL_ESDHC=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]71CONFIG_MTD=y
Tom Rinia73788c2021-09-22 14:50:37 -0400[diff] [blame]72CONFIG_NAND_FSL_IFC=y
Tom Rinifdae0072021-09-22 14:50:34 -0400[diff] [blame]73CONFIG_SYS_NAND_ONFI_DETECTION=y
Tom Rini1cf7c412021-09-22 14:50:38 -0400[diff] [blame]74CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
75CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]76CONFIG_DM_SPI_FLASH=y
Rajat Srivastava36f09912019-04-24 18:15:12 +0530[diff] [blame]77# CONFIG_SPI_FLASH_BAR is not set
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]78CONFIG_SPI_FLASH_SPANSION=y
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]79CONFIG_PHYLIB=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]80CONFIG_PHYLIB_10G=y
81CONFIG_PHY_REALTEK=y
82CONFIG_PHY_TERANETICS=y
83CONFIG_PHY_VITESSE=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]84CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]85CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]86CONFIG_MII=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]87CONFIG_NVME_PCI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]88CONFIG_PCI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]89CONFIG_DM_PCI_COMPAT=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]90CONFIG_PCIE_LAYERSCAPE_RC=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]91CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
Peng Ma1c4bf2f2019-01-30 19:17:44 +0800[diff] [blame]92CONFIG_DM_SCSI=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]93CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]94CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]95CONFIG_DM_SPI=y
Tom Rinib937b2e2016-06-13 09:45:14 -0400[diff] [blame]96CONFIG_FSL_QSPI=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]97CONFIG_USB=y
98CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]99CONFIG_USB_XHCI_DWC3=y