| Simon Glass | e42bff5 | 2020-09-22 12:44:48 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2016 Intel Corporation. |
| 4 | */ |
| 5 | |
| 6 | Scope (\_SB.PCI0) { |
| 7 | /* 0xD6- is the port address */ |
| 8 | /* 0x600- is the dynamic clock gating control register offset (GENR) */ |
| 9 | OperationRegion (SBMM, SystemMemory, |
| 10 | Or ( Or (IOMAP_P2SB_BAR, |
| 11 | ShiftLeft(0xD6, PCR_PORTID_SHIFT)), 0x0600), 0x18) |
| 12 | Field (SBMM, DWordAcc, NoLock, Preserve) |
| 13 | { |
| 14 | GENR, 32, |
| 15 | Offset (0x08), |
| 16 | , 5, /* bit[5] represents Force Card Detect SD Card */ |
| 17 | GRR3, 1, /* GPPRVRW3 for SD Card detect Bypass. It's active high */ |
| 18 | } |
| 19 | |
| 20 | /* SCC power gate control method, this method must be serialized as |
| 21 | * multiple device will control the GENR register |
| 22 | * |
| 23 | * Arguments: (2) |
| 24 | * Arg0: 0-AND 1-OR |
| 25 | * Arg1: Value |
| 26 | */ |
| 27 | Method (SCPG, 2, Serialized) |
| 28 | { |
| 29 | if (LEqual(Arg0, 0x1)) { |
| 30 | Or (^GENR, Arg1, ^GENR) |
| 31 | } ElseIf (LEqual(Arg0, 0x0)){ |
| 32 | And (^GENR, Arg1, ^GENR) |
| 33 | } |
| 34 | } |
| 35 | |
| 36 | /* eMMC */ |
| 37 | Device (SDHA) { |
| 38 | Name (_ADR, 0x001C0000) |
| 39 | Name (_DDN, "Intel(R) eMMC Controller - 80865ACC") |
| 40 | Name (UUID, ToUUID ("E5C937D0-3553-4D7A-9117-EA4D19C3434D")) |
| 41 | |
| 42 | /* |
| 43 | * Device Specific Method |
| 44 | * Arg0 - UUID |
| 45 | * Arg1 - Revision |
| 46 | * Arg2 - Function Index |
| 47 | */ |
| 48 | Method (_DSM, 4) |
| 49 | { |
| 50 | If (LEqual (Arg0, ^UUID)) { |
| 51 | /* |
| 52 | * Function 9: Device Readiness Durations |
| 53 | * Returns a package of five integers covering |
| 54 | * various device related delays in PCIe Base Spec. |
| 55 | */ |
| 56 | If (LEqual (Arg2, 9)) { |
| 57 | /* |
| 58 | * Function 9 support for revision 3. |
| 59 | * ECN link for function definitions |
| 60 | * [https://pcisig.com/sites/default/files/ |
| 61 | * specification_documents/ |
| 62 | * ECN_fw_latency_optimization_final.pdf] |
| 63 | */ |
| 64 | If (LEqual (Arg1, 3)) { |
| 65 | /* |
| 66 | * Integer 0: FW reset time. |
| 67 | * Integer 1: FW data link up time. |
| 68 | * Integer 2: FW functional level reset |
| 69 | * time. |
| 70 | * Integer 3: FW D3 hot to D0 time. |
| 71 | * Integer 4: FW VF enable time. |
| 72 | * set ACPI constant Ones for elements |
| 73 | * where overriding the default value |
| 74 | * is not desired. |
| 75 | */ |
| 76 | Return (Package (5) {0, Ones, Ones, |
| 77 | Ones, Ones}) |
| 78 | } |
| 79 | } |
| 80 | } |
| 81 | Return (Buffer() { 0x00 }) |
| 82 | } |
| 83 | |
| 84 | Method (_PS0, 0, NotSerialized) |
| 85 | { |
| 86 | /* Clear clock gate |
| 87 | * Clear bit 6 and 0 |
| 88 | */ |
| 89 | ^^SCPG(0,0xFFFFFFBE) |
| 90 | /* Sleep 2 ms */ |
| 91 | Sleep (2) |
| 92 | } |
| 93 | |
| 94 | Method (_PS3, 0, NotSerialized) |
| 95 | { |
| 96 | /* Enable power gate |
| 97 | * Restore clock gate |
| 98 | * Restore bit 6 and 0 |
| 99 | */ |
| 100 | ^^SCPG(1,0x00000041) |
| 101 | } |
| 102 | |
| 103 | Device (CARD) |
| 104 | { |
| 105 | Name (_ADR, 0x00000008) |
| 106 | Method (_RMV, 0, NotSerialized) |
| 107 | { |
| 108 | Return (0) |
| 109 | } |
| 110 | } |
| 111 | } /* Device (SDHA) */ |
| 112 | |
| 113 | /* SD CARD */ |
| 114 | Device (SDCD) |
| 115 | { |
| 116 | Name (_ADR, 0x001B0000) |
| 117 | Name (_S0W, 4) /* _S0W: S0 Device Wake State */ |
| 118 | Name (SCD0, 0) /* Store SD_CD DW0 address */ |
| 119 | |
| 120 | /* Set the host ownership of sdcard cd during kernel boot */ |
| 121 | Method (_INI, 0) |
| 122 | { |
| 123 | /* Check SDCard CD port is valid */ |
| 124 | If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDO, 0) )) |
| 125 | { |
| 126 | /* Store DW0 address of SD_CD */ |
| 127 | Store (GDW0 (\SCDP, \SCDO), SCD0) |
| 128 | /* Get the current SD_CD ownership */ |
| 129 | Store (\_SB.GHO (\SCDP, \SCDO), Local0) |
| 130 | /* Set host ownership as GPIO in HOSTSW_OWN reg */ |
| 131 | Or (Local0, ShiftLeft (1, Mod (\SCDO, 32)), Local0) |
| 132 | \_SB.SHO (\SCDP, \SCDO, Local0) |
| 133 | } |
| 134 | } |
| 135 | |
| 136 | Method (_PS0, 0, NotSerialized) |
| 137 | { |
| 138 | /* Check SDCard CD port is valid */ |
| 139 | If (LAnd (LNotEqual (\SCDP, 0), LNotEqual (\SCDO, 0) )) |
| 140 | { |
| 141 | /* Store DW0 into local0 to get rxstate of GPIO */ |
| 142 | Store (\_SB.GPC0 (SCD0), Local0) |
| 143 | /* Extract rxstate [bit 1] of sdcard card detect pin */ |
| 144 | And (Local0, PAD_CFG0_RX_STATE, Local0) |
| 145 | /* If the sdcard is present, rxstate is low. |
| 146 | * If sdcard is not present, rxstate is High. |
| 147 | * Write the inverted value of rxstate to GRR3. |
| 148 | */ |
| 149 | If (LEqual (Local0, 0)) { |
| 150 | Store (1, ^^GRR3) |
| 151 | } Else { |
| 152 | Store (0, ^^GRR3) |
| 153 | } |
| 154 | Sleep (2) |
| 155 | } |
| 156 | } |
| 157 | |
| 158 | Method (_PS3, 0, NotSerialized) |
| 159 | { |
| 160 | /* Clear GRR3 to Power Gate SD Controller */ |
| 161 | Store (0, ^^GRR3) |
| 162 | } |
| 163 | |
| 164 | Device (CARD) |
| 165 | { |
| 166 | Name (_ADR, 0x00000008) |
| 167 | Method (_RMV, 0, NotSerialized) |
| 168 | { |
| 169 | Return (1) |
| 170 | } |
| 171 | } |
| 172 | } /* Device (SDCD) */ |
| 173 | } |