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Simon Glass0e724032012-12-13 20:49:12 +00001/*
2 * Copyright (c) 2012 The Chromium OS Authors.
3 * (C) Copyright 2002-2010
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Simon Glass0e724032012-12-13 20:49:12 +00007 */
8
9#ifndef __ASM_GENERIC_GBL_DATA_H
10#define __ASM_GENERIC_GBL_DATA_H
11/*
12 * The following data structure is placed in some memory which is
13 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
14 * some locked parts of the data cache) to allow for a minimum set of
15 * global variables during system initialization (until we have set
16 * up the memory controller so that we can use RAM).
17 *
18 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
19 *
20 * Each architecture has its own private fields. For now all are private
21 */
22
23#ifndef __ASSEMBLY__
Simon Glass1bb49232015-11-08 23:47:48 -070024#include <membuff.h>
Simon Glassdd6ab882014-02-26 15:59:18 -070025#include <linux/list.h>
26
Simon Glass0e724032012-12-13 20:49:12 +000027typedef struct global_data {
28 bd_t *bd;
29 unsigned long flags;
Simon Glass059c54f2013-03-05 14:40:05 +000030 unsigned int baudrate;
Robert P. J. Day3261d062016-09-01 12:54:32 -040031 unsigned long cpu_clk; /* CPU clock in Hz! */
Simon Glass0e724032012-12-13 20:49:12 +000032 unsigned long bus_clk;
33 /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
34 unsigned long pci_clk;
35 unsigned long mem_clk;
36#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
Robert P. J. Day3261d062016-09-01 12:54:32 -040037 unsigned long fb_base; /* Base address of framebuffer mem */
Simon Glass0e724032012-12-13 20:49:12 +000038#endif
39#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
Robert P. J. Day3261d062016-09-01 12:54:32 -040040 unsigned long post_log_word; /* Record POST activities */
41 unsigned long post_log_res; /* success of POST test */
42 unsigned long post_init_f_time; /* When post_init_f started */
Simon Glass0e724032012-12-13 20:49:12 +000043#endif
44#ifdef CONFIG_BOARD_TYPES
45 unsigned long board_type;
46#endif
47 unsigned long have_console; /* serial_init() was called */
Simon Glasse304a5e2016-10-17 20:12:36 -060048#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
Simon Glass0e724032012-12-13 20:49:12 +000049 unsigned long precon_buf_idx; /* Pre-Console buffer index */
50#endif
Robert P. J. Day3261d062016-09-01 12:54:32 -040051 unsigned long env_addr; /* Address of Environment struct */
Simon Glass4bc2ad22017-08-03 12:21:56 -060052 unsigned long env_valid; /* Environment valid? enum env_valid */
Simon Glass0e724032012-12-13 20:49:12 +000053
Robert P. J. Day3261d062016-09-01 12:54:32 -040054 unsigned long ram_top; /* Top address of RAM used by U-Boot */
Simon Glass0e724032012-12-13 20:49:12 +000055 unsigned long relocaddr; /* Start address of U-Boot in RAM */
Robert P. J. Day3261d062016-09-01 12:54:32 -040056 phys_size_t ram_size; /* RAM size */
57 unsigned long mon_len; /* monitor len */
Simon Glass0e724032012-12-13 20:49:12 +000058 unsigned long irq_sp; /* irq stack pointer */
59 unsigned long start_addr_sp; /* start_addr_stackpointer */
60 unsigned long reloc_off;
61 struct global_data *new_gd; /* relocated global data */
Simon Glassdd6ab882014-02-26 15:59:18 -070062
63#ifdef CONFIG_DM
Simon Glassa730c5d2014-07-23 06:55:04 -060064 struct udevice *dm_root; /* Root instance for Driver Model */
65 struct udevice *dm_root_f; /* Pre-relocation root instance */
Simon Glassdd6ab882014-02-26 15:59:18 -070066 struct list_head uclass_root; /* Head of core tree */
67#endif
Thomas Choufb798b12015-10-09 13:46:34 +080068#ifdef CONFIG_TIMER
Robert P. J. Day3261d062016-09-01 12:54:32 -040069 struct udevice *timer; /* Timer instance for Driver Model */
Thomas Choufb798b12015-10-09 13:46:34 +080070#endif
Simon Glassdd6ab882014-02-26 15:59:18 -070071
Robert P. J. Day3261d062016-09-01 12:54:32 -040072 const void *fdt_blob; /* Our device tree, NULL if none */
73 void *new_fdt; /* Relocated FDT */
74 unsigned long fdt_size; /* Space reserved for relocated FDT */
Simon Glassa6eedb82017-05-18 20:08:53 -060075#ifdef CONFIG_OF_LIVE
76 struct device_node *of_root;
77#endif
Martin Dorwigcb2c2862015-01-26 15:22:54 -070078 struct jt_funcs *jt; /* jump table */
Simon Glass64b723f2017-08-03 12:22:12 -060079 char env_buf[32]; /* buffer for env_get() before reloc. */
Simon Glass209a1a62013-06-11 11:14:42 -070080#ifdef CONFIG_TRACE
81 void *trace_buff; /* The trace buffer */
82#endif
Heiko Schochere7d9c4f2012-01-16 21:12:23 +000083#if defined(CONFIG_SYS_I2C)
84 int cur_i2c_bus; /* current used i2c bus */
85#endif
York Suna4c02662014-02-10 14:02:52 -080086#ifdef CONFIG_SYS_I2C_MXC
87 void *srdata[10];
88#endif
Peng Fan9a60a9e2017-05-09 10:32:03 +080089 unsigned int timebase_h;
90 unsigned int timebase_l;
Andy Yan1fa20e4d2017-07-24 17:43:34 +080091#if CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glass863e4042014-07-10 22:23:28 -060092 unsigned long malloc_base; /* base address of early malloc() */
93 unsigned long malloc_limit; /* limit address */
94 unsigned long malloc_ptr; /* current address */
95#endif
Bin Mengf1b81fc2014-12-30 22:53:21 +080096#ifdef CONFIG_PCI
97 struct pci_controller *hose; /* PCI hose for early use */
Simon Glass5888bd22015-07-03 18:28:27 -060098 phys_addr_t pci_ram_top; /* top of region accessible to PCI */
Bin Mengf1b81fc2014-12-30 22:53:21 +080099#endif
100#ifdef CONFIG_PCI_BOOTDELAY
101 int pcidelay_done;
102#endif
Simon Glassa4c2e132014-11-10 18:00:20 -0700103 struct udevice *cur_serial_dev; /* current serial device */
Simon Glass04ae3d02015-08-17 09:28:44 -0600104 struct arch_global_data arch; /* architecture-specific data */
Simon Glass1bb49232015-11-08 23:47:48 -0700105#ifdef CONFIG_CONSOLE_RECORD
106 struct membuff console_out; /* console output */
107 struct membuff console_in; /* console input */
108#endif
Simon Glassfce58f52016-01-18 19:52:21 -0700109#ifdef CONFIG_DM_VIDEO
110 ulong video_top; /* Top of video frame buffer area */
111 ulong video_bottom; /* Bottom of video frame buffer area */
112#endif
Simon Glass88200332017-05-22 05:05:25 -0600113#ifdef CONFIG_BOOTSTAGE
114 struct bootstage_data *bootstage; /* Bootstage information */
Simon Glassb9aff922017-05-22 05:05:30 -0600115 struct bootstage_data *new_bootstage; /* Relocated bootstage info */
Simon Glass88200332017-05-22 05:05:25 -0600116#endif
Simon Glass0e724032012-12-13 20:49:12 +0000117} gd_t;
118#endif
119
Simon Glassb4de3f32017-03-31 08:40:24 -0600120#ifdef CONFIG_BOARD_TYPES
121#define gd_board_type() gd->board_type
122#else
123#define gd_board_type() 0
124#endif
125
Simon Glass0e724032012-12-13 20:49:12 +0000126/*
Simon Glassfeb00272015-07-31 09:31:27 -0600127 * Global Data Flags - the top 16 bits are reserved for arch-specific flags
Simon Glass0e724032012-12-13 20:49:12 +0000128 */
129#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
130#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
131#define GD_FLG_SILENT 0x00004 /* Silent mode */
132#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
133#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
134#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
135#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
136#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
Simon Glassb9d5f6b2014-07-23 06:55:07 -0600137#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
Simon Glass94890462014-11-10 17:16:43 -0700138#define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */
Simon Glassfa2a4db2015-06-23 15:39:10 -0600139#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
Robert P. J. Day3261d062016-09-01 12:54:32 -0400140#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
141#define GD_FLG_RECORD 0x01000 /* Record console */
142#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
Eddie Cai32258992017-03-15 08:43:28 -0600143#define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */
Simon Glass0e724032012-12-13 20:49:12 +0000144
145#endif /* __ASM_GENERIC_GBL_DATA_H */