blob: e42a736136bc95f50df30471a396fa19760fe7e3 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sébastien Szymanskia7762e42017-03-07 14:33:25 +01002/*
3 * Copyright (C) 2017 Armadeus Systems
4 *
5 * Configuration settings for the OPOS6ULDev board
Sébastien Szymanskia7762e42017-03-07 14:33:25 +01006 */
7
8#ifndef __OPOS6ULDEV_CONFIG_H
9#define __OPOS6ULDEV_CONFIG_H
10
11#include "mx6_common.h"
12
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010013/* Miscellaneous configurable options */
14#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
15
16/* Physical Memory Map */
Tom Rinibb4dd962022-11-16 13:10:37 -050017#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
Tom Rini6a5dccc2022-11-16 13:10:41 -050018#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
19#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010020
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010021/* USB */
22#ifdef CONFIG_USB_EHCI_MX6
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010023#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
24#define CONFIG_MXC_USB_FLAGS 0
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010025#endif
26
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010027/* LCD */
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010028#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010029
Tom Rini272eb5b2022-03-21 21:33:32 -040030#define CONFIG_ROOTPATH "/tftpboot/opos6ul-root"
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010031
Sébastien Szymanskia7762e42017-03-07 14:33:25 +010032#endif /* __OPOS6ULDEV_CONFIG_H */