Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2011 OMICRON electronics GmbH |
| 4 | * |
Miquel Raynal | 1f1ae15 | 2018-08-16 17:30:07 +0200 | [diff] [blame] | 5 | * based on drivers/mtd/nand/raw/nand_spl_load.c |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 6 | * |
| 7 | * Copyright (C) 2011 |
| 8 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Simon Glass | 2dc9c34 | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 12 | #include <image.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 13 | #include <log.h> |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 14 | #include <spi.h> |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 15 | #include <spi_flash.h> |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 16 | #include <errno.h> |
Tom Rini | 1e2abf9 | 2012-08-14 14:34:10 -0700 | [diff] [blame] | 17 | #include <spl.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 18 | #include <asm/global_data.h> |
Simon Glass | 0034d96 | 2021-08-07 07:24:01 -0600 | [diff] [blame] | 19 | #include <dm/ofnode.h> |
Philipp Tomsich | e8eba3f | 2017-04-17 17:45:11 +0200 | [diff] [blame] | 20 | |
Tom Rini | c2e7888 | 2021-10-30 23:03:48 -0400 | [diff] [blame] | 21 | #if CONFIG_IS_ENABLED(OS_BOOT) |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 22 | /* |
| 23 | * Load the kernel, check for a valid header we can parse, and if found load |
| 24 | * the kernel and then device tree. |
| 25 | */ |
Simon Glass | ee30679 | 2016-09-24 18:20:13 -0600 | [diff] [blame] | 26 | static int spi_load_image_os(struct spl_image_info *spl_image, |
Pali Rohár | dda8f88 | 2022-01-14 14:31:38 +0100 | [diff] [blame] | 27 | struct spl_boot_device *bootdev, |
Simon Glass | ee30679 | 2016-09-24 18:20:13 -0600 | [diff] [blame] | 28 | struct spi_flash *flash, |
Simon Glass | bb7d3bb | 2022-09-06 20:26:52 -0600 | [diff] [blame] | 29 | struct legacy_img_hdr *header) |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 30 | { |
Marek Vasut | 02266e2 | 2016-04-29 00:44:54 +0200 | [diff] [blame] | 31 | int err; |
| 32 | |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 33 | /* Read for a header, parse or error out. */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame^] | 34 | spi_flash_read(flash, CFG_SYS_SPI_KERNEL_OFFS, sizeof(*header), |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 35 | (void *)header); |
| 36 | |
| 37 | if (image_get_magic(header) != IH_MAGIC) |
| 38 | return -1; |
| 39 | |
Pali Rohár | dda8f88 | 2022-01-14 14:31:38 +0100 | [diff] [blame] | 40 | err = spl_parse_image_header(spl_image, bootdev, header); |
Marek Vasut | 02266e2 | 2016-04-29 00:44:54 +0200 | [diff] [blame] | 41 | if (err) |
| 42 | return err; |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 43 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame^] | 44 | spi_flash_read(flash, CFG_SYS_SPI_KERNEL_OFFS, |
Simon Glass | ee30679 | 2016-09-24 18:20:13 -0600 | [diff] [blame] | 45 | spl_image->size, (void *)spl_image->load_addr); |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 46 | |
| 47 | /* Read device tree. */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame^] | 48 | spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS, |
| 49 | CFG_SYS_SPI_ARGS_SIZE, |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 50 | (void *)CONFIG_SYS_SPL_ARGS_ADDR); |
| 51 | |
| 52 | return 0; |
| 53 | } |
| 54 | #endif |
| 55 | |
Lokesh Vutla | 255c92a | 2016-05-24 10:34:40 +0530 | [diff] [blame] | 56 | static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector, |
| 57 | ulong count, void *buf) |
| 58 | { |
| 59 | struct spi_flash *flash = load->dev; |
| 60 | ulong ret; |
| 61 | |
| 62 | ret = spi_flash_read(flash, sector, count, buf); |
| 63 | if (!ret) |
| 64 | return count; |
| 65 | else |
| 66 | return 0; |
| 67 | } |
Peng Fan | 3a57169 | 2019-09-23 10:18:41 +0800 | [diff] [blame] | 68 | |
| 69 | unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash) |
| 70 | { |
| 71 | return CONFIG_SYS_SPI_U_BOOT_OFFS; |
| 72 | } |
| 73 | |
Vaishnav Achath | 58a0cdb | 2022-06-03 11:32:15 +0530 | [diff] [blame] | 74 | u32 __weak spl_spi_boot_bus(void) |
| 75 | { |
| 76 | return CONFIG_SF_DEFAULT_BUS; |
| 77 | } |
| 78 | |
| 79 | u32 __weak spl_spi_boot_cs(void) |
| 80 | { |
| 81 | return CONFIG_SF_DEFAULT_CS; |
| 82 | } |
| 83 | |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 84 | /* |
| 85 | * The main entry for SPI booting. It's necessary that SDRAM is already |
| 86 | * configured and available since this code loads the main U-Boot image |
| 87 | * from SPI into SDRAM and starts it from there. |
| 88 | */ |
Simon Glass | ee30679 | 2016-09-24 18:20:13 -0600 | [diff] [blame] | 89 | static int spl_spi_load_image(struct spl_image_info *spl_image, |
| 90 | struct spl_boot_device *bootdev) |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 91 | { |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 92 | int err = 0; |
Peng Fan | 3a57169 | 2019-09-23 10:18:41 +0800 | [diff] [blame] | 93 | unsigned int payload_offs; |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 94 | struct spi_flash *flash; |
Simon Glass | bb7d3bb | 2022-09-06 20:26:52 -0600 | [diff] [blame] | 95 | struct legacy_img_hdr *header; |
Vaishnav Achath | 58a0cdb | 2022-06-03 11:32:15 +0530 | [diff] [blame] | 96 | unsigned int sf_bus = spl_spi_boot_bus(); |
| 97 | unsigned int sf_cs = spl_spi_boot_cs(); |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 98 | |
| 99 | /* |
| 100 | * Load U-Boot image from SPI flash into RAM |
Patrick Delaunay | fa19c65 | 2019-02-27 15:36:44 +0100 | [diff] [blame] | 101 | * In DM mode: defaults speed and mode will be |
| 102 | * taken from DT when available |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 103 | */ |
Vaishnav Achath | 58a0cdb | 2022-06-03 11:32:15 +0530 | [diff] [blame] | 104 | flash = spi_flash_probe(sf_bus, sf_cs, |
Nikita Kiryanov | 6c6ccdf | 2014-08-20 15:08:48 +0300 | [diff] [blame] | 105 | CONFIG_SF_DEFAULT_SPEED, |
| 106 | CONFIG_SF_DEFAULT_MODE); |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 107 | if (!flash) { |
Tom Rini | 1e2abf9 | 2012-08-14 14:34:10 -0700 | [diff] [blame] | 108 | puts("SPI probe failed.\n"); |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 109 | return -ENODEV; |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 110 | } |
| 111 | |
Peng Fan | 3a57169 | 2019-09-23 10:18:41 +0800 | [diff] [blame] | 112 | payload_offs = spl_spi_get_uboot_offs(flash); |
| 113 | |
Michal Simek | b76359a | 2018-10-04 09:30:20 +0200 | [diff] [blame] | 114 | header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 115 | |
Simon Glass | 3580f6d | 2021-08-07 07:24:03 -0600 | [diff] [blame] | 116 | if (CONFIG_IS_ENABLED(OF_REAL)) { |
| 117 | payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset", |
| 118 | payload_offs); |
| 119 | } |
Philipp Tomsich | e8eba3f | 2017-04-17 17:45:11 +0200 | [diff] [blame] | 120 | |
Tom Rini | c2e7888 | 2021-10-30 23:03:48 -0400 | [diff] [blame] | 121 | #if CONFIG_IS_ENABLED(OS_BOOT) |
Pali Rohár | dda8f88 | 2022-01-14 14:31:38 +0100 | [diff] [blame] | 122 | if (spl_start_uboot() || spi_load_image_os(spl_image, bootdev, flash, header)) |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 123 | #endif |
| 124 | { |
| 125 | /* Load u-boot, mkimage header is 64 bytes. */ |
Michal Simek | b76359a | 2018-10-04 09:30:20 +0200 | [diff] [blame] | 126 | err = spi_flash_read(flash, payload_offs, sizeof(*header), |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 127 | (void *)header); |
Simon Glass | 2c066d6 | 2017-01-16 07:03:27 -0700 | [diff] [blame] | 128 | if (err) { |
| 129 | debug("%s: Failed to read from SPI flash (err=%d)\n", |
| 130 | __func__, err); |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 131 | return err; |
Simon Glass | 2c066d6 | 2017-01-16 07:03:27 -0700 | [diff] [blame] | 132 | } |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 133 | |
Marek Vasut | f6e0e5c | 2018-05-31 17:59:29 +0200 | [diff] [blame] | 134 | if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) && |
| 135 | image_get_magic(header) == FDT_MAGIC) { |
| 136 | err = spi_flash_read(flash, payload_offs, |
| 137 | roundup(fdt_totalsize(header), 4), |
| 138 | (void *)CONFIG_SYS_LOAD_ADDR); |
| 139 | if (err) |
| 140 | return err; |
Pali Rohár | dda8f88 | 2022-01-14 14:31:38 +0100 | [diff] [blame] | 141 | err = spl_parse_image_header(spl_image, bootdev, |
Simon Glass | bb7d3bb | 2022-09-06 20:26:52 -0600 | [diff] [blame] | 142 | (struct legacy_img_hdr *)CONFIG_SYS_LOAD_ADDR); |
Marek Vasut | f6e0e5c | 2018-05-31 17:59:29 +0200 | [diff] [blame] | 143 | } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && |
| 144 | image_get_magic(header) == FDT_MAGIC) { |
Lokesh Vutla | 255c92a | 2016-05-24 10:34:40 +0530 | [diff] [blame] | 145 | struct spl_load_info load; |
| 146 | |
| 147 | debug("Found FIT\n"); |
| 148 | load.dev = flash; |
| 149 | load.priv = NULL; |
| 150 | load.filename = NULL; |
| 151 | load.bl_len = 1; |
| 152 | load.read = spl_spi_fit_read; |
Simon Glass | 43a734f | 2016-09-24 18:20:16 -0600 | [diff] [blame] | 153 | err = spl_load_simple_fit(spl_image, &load, |
Philipp Tomsich | e8eba3f | 2017-04-17 17:45:11 +0200 | [diff] [blame] | 154 | payload_offs, |
Lokesh Vutla | 255c92a | 2016-05-24 10:34:40 +0530 | [diff] [blame] | 155 | header); |
Peng Fan | 053207c | 2019-09-23 10:18:47 +0800 | [diff] [blame] | 156 | } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { |
| 157 | struct spl_load_info load; |
| 158 | |
| 159 | load.dev = flash; |
| 160 | load.priv = NULL; |
| 161 | load.filename = NULL; |
| 162 | load.bl_len = 1; |
| 163 | load.read = spl_spi_fit_read; |
| 164 | |
| 165 | err = spl_load_imx_container(spl_image, &load, |
| 166 | payload_offs); |
Lokesh Vutla | 255c92a | 2016-05-24 10:34:40 +0530 | [diff] [blame] | 167 | } else { |
Pali Rohár | dda8f88 | 2022-01-14 14:31:38 +0100 | [diff] [blame] | 168 | err = spl_parse_image_header(spl_image, bootdev, header); |
Lokesh Vutla | 255c92a | 2016-05-24 10:34:40 +0530 | [diff] [blame] | 169 | if (err) |
| 170 | return err; |
Pali Rohár | 1104167 | 2021-07-23 11:14:27 +0200 | [diff] [blame] | 171 | err = spi_flash_read(flash, payload_offs + spl_image->offset, |
Simon Glass | ee30679 | 2016-09-24 18:20:13 -0600 | [diff] [blame] | 172 | spl_image->size, |
| 173 | (void *)spl_image->load_addr); |
Lokesh Vutla | 255c92a | 2016-05-24 10:34:40 +0530 | [diff] [blame] | 174 | } |
Vaishnav Achath | 2fedef4 | 2022-05-09 14:03:32 +0530 | [diff] [blame] | 175 | if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET)) { |
| 176 | err = spi_nor_remove(flash); |
| 177 | if (err) |
| 178 | return err; |
| 179 | } |
Tom Rini | d4cdb7a | 2014-04-03 07:52:55 -0400 | [diff] [blame] | 180 | } |
Nikita Kiryanov | 33eefe4 | 2015-11-08 17:11:49 +0200 | [diff] [blame] | 181 | |
| 182 | return err; |
Christian Riesch | 23f16a8 | 2011-12-09 09:47:35 +0000 | [diff] [blame] | 183 | } |
Simon Glass | b9f6d89 | 2016-09-24 18:20:09 -0600 | [diff] [blame] | 184 | /* Use priorty 1 so that boards can override this */ |
Simon Glass | 4fc1f25 | 2016-11-30 15:30:50 -0700 | [diff] [blame] | 185 | SPL_LOAD_IMAGE_METHOD("SPI", 1, BOOT_DEVICE_SPI, spl_spi_load_image); |