Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 2 | /* |
Marcel Ziswiler | 75b9327 | 2020-01-28 14:42:23 +0100 | [diff] [blame] | 3 | * Copyright (c) 2016-2020 Toradex |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 6 | #include <config.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 7 | #include <asm/global_data.h> |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 8 | #include "tdx-cfg-block.h" |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 9 | #include "tdx-eeprom.h" |
| 10 | |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 11 | #include <command.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 12 | #include <asm/cache.h> |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 13 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 14 | #include <cli.h> |
| 15 | #include <console.h> |
Simon Glass | 0af6e2d | 2019-08-01 09:46:52 -0600 | [diff] [blame] | 16 | #include <env.h> |
Tom Rini | 063c938 | 2022-07-23 13:05:03 -0400 | [diff] [blame] | 17 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 18 | #include <flash.h> |
Tom Rini | 063c938 | 2022-07-23 13:05:03 -0400 | [diff] [blame] | 19 | #endif |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 20 | #include <malloc.h> |
| 21 | #include <mmc.h> |
| 22 | #include <nand.h> |
Simon Glass | 0ffb9d6 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 23 | #include <asm/mach-types.h> |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 24 | |
| 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
| 27 | #define TAG_VALID 0xcf01 |
| 28 | #define TAG_MAC 0x0000 |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 29 | #define TAG_CAR_SERIAL 0x0021 |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 30 | #define TAG_HW 0x0008 |
| 31 | #define TAG_INVALID 0xffff |
| 32 | |
| 33 | #define TAG_FLAG_VALID 0x1 |
| 34 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 35 | #define TDX_EEPROM_ID_MODULE 0 |
| 36 | #define TDX_EEPROM_ID_CARRIER 1 |
| 37 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 38 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 39 | #define TDX_CFG_BLOCK_MAX_SIZE 512 |
| 40 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 41 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
| 42 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 43 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 44 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM) |
| 45 | #define TDX_CFG_BLOCK_MAX_SIZE 64 |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 46 | #else |
| 47 | #error Toradex config block location not set |
| 48 | #endif |
| 49 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 50 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 51 | #define TDX_CFG_BLOCK_EXTRA_MAX_SIZE 64 |
| 52 | #endif |
| 53 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 54 | struct toradex_tag { |
| 55 | u32 len:14; |
| 56 | u32 flags:2; |
| 57 | u32 id:16; |
| 58 | }; |
| 59 | |
| 60 | bool valid_cfgblock; |
| 61 | struct toradex_hw tdx_hw_tag; |
| 62 | struct toradex_eth_addr tdx_eth_addr; |
| 63 | u32 tdx_serial; |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 64 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 65 | u32 tdx_car_serial; |
| 66 | bool valid_cfgblock_carrier; |
| 67 | struct toradex_hw tdx_car_hw_tag; |
| 68 | #endif |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 69 | |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 70 | #define TARGET_IS_ENABLED(x) IS_ENABLED(CONFIG_TARGET_ ## x) |
| 71 | |
| 72 | const struct toradex_som toradex_modules[] = { |
Stefan Eichenberger | 5e219cf | 2024-12-11 13:18:52 +0100 | [diff] [blame] | 73 | { 0, "UNKNOWN MODULE", 0 }, |
| 74 | { COLIBRI_PXA270_V1_312MHZ, "Colibri PXA270 312MHz", 0 }, |
| 75 | { COLIBRI_PXA270_V1_520MHZ, "Colibri PXA270 520MHz", 0 }, |
| 76 | { COLIBRI_PXA320, "Colibri PXA320 806MHz", 0 }, |
| 77 | { COLIBRI_PXA300, "Colibri PXA300 208MHz", 0 }, |
| 78 | { COLIBRI_PXA310, "Colibri PXA310 624MHz", 0 }, |
| 79 | { COLIBRI_PXA320_IT, "Colibri PXA320IT 806MHz", 0 }, |
| 80 | { COLIBRI_PXA300_XT, "Colibri PXA300 208MHz XT", 0 }, |
| 81 | { COLIBRI_PXA270_312MHZ, "Colibri PXA270 312MHz", 0 }, |
| 82 | { COLIBRI_PXA270_520MHZ, "Colibri PXA270 520MHz", 0 }, |
| 83 | { COLIBRI_VF50, "Colibri VF50 128MB", TARGET_IS_ENABLED(COLIBRI_VF) }, |
| 84 | { COLIBRI_VF61, "Colibri VF61 256MB", TARGET_IS_ENABLED(COLIBRI_VF) }, |
| 85 | { COLIBRI_VF61_IT, "Colibri VF61 256MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, |
| 86 | { COLIBRI_VF50_IT, "Colibri VF50 128MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, |
| 87 | { COLIBRI_IMX6S, "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 88 | { COLIBRI_IMX6DL, "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 89 | { COLIBRI_IMX6S_IT, "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 90 | { COLIBRI_IMX6DL_IT, "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 91 | { COLIBRI_T20_256MB, "Colibri T20 256MB", TARGET_IS_ENABLED(COLIBRI_T20) }, |
| 92 | { COLIBRI_T20_512MB, "Colibri T20 512MB", TARGET_IS_ENABLED(COLIBRI_T20) }, |
| 93 | { COLIBRI_T20_512MB_IT, "Colibri T20 512MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, |
| 94 | { COLIBRI_T30, "Colibri T30 1GB", TARGET_IS_ENABLED(COLIBRI_T30) }, |
| 95 | { COLIBRI_T20_256MB_IT, "Colibri T20 256MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, |
| 96 | { APALIS_T30_2GB, "Apalis T30 2GB", TARGET_IS_ENABLED(APALIS_T30) }, |
| 97 | { APALIS_T30_1GB, "Apalis T30 1GB", TARGET_IS_ENABLED(APALIS_T30) }, |
| 98 | { APALIS_IMX6Q, "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 99 | { APALIS_IMX6Q_IT, "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 100 | { APALIS_IMX6D, "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 101 | { COLIBRI_T30_IT, "Colibri T30 1GB IT", TARGET_IS_ENABLED(COLIBRI_T30) }, |
| 102 | { APALIS_T30_IT, "Apalis T30 1GB IT", TARGET_IS_ENABLED(APALIS_T30) }, |
| 103 | { COLIBRI_IMX7S, "Colibri iMX7S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, |
| 104 | { COLIBRI_IMX7D, "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, |
| 105 | { APALIS_TK1_2GB, "Apalis TK1 2GB", TARGET_IS_ENABLED(APALIS_TK1) }, |
| 106 | { APALIS_IMX6D_IT, "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 107 | { COLIBRI_IMX6ULL, "Colibri iMX6ULL 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, |
| 108 | { APALIS_IMX8QM_WIFI_BT_IT, "Apalis iMX8QM 4GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 109 | { COLIBRI_IMX8QXP_WIFI_BT_IT, "Colibri iMX8QXP 2GB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, |
| 110 | { COLIBRI_IMX7D_EMMC, "Colibri iMX7D 1GB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, |
| 111 | { COLIBRI_IMX6ULL_WIFI_BT_IT, "Colibri iMX6ULL 512MB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, |
| 112 | { COLIBRI_IMX7D_EPDC, "Colibri iMX7D 512MB EPDC", TARGET_IS_ENABLED(COLIBRI_IMX7) }, |
| 113 | { APALIS_TK1_4GB, "Apalis TK1 4GB", TARGET_IS_ENABLED(APALIS_TK1) }, |
| 114 | { COLIBRI_T20_512MB_IT_SETEK, "Colibri T20 512MB IT SETEK", TARGET_IS_ENABLED(COLIBRI_T20) }, |
| 115 | { COLIBRI_IMX6ULL_IT, "Colibri iMX6ULL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, |
| 116 | { COLIBRI_IMX6ULL_WIFI_BT, "Colibri iMX6ULL 512MB WB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, |
| 117 | { APALIS_IMX8QXP_WIFI_BT_IT, "Apalis iMX8QXP 2GB WB IT", 0 }, |
| 118 | { APALIS_IMX8QM_IT, "Apalis iMX8QM 4GB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 119 | { APALIS_IMX8QP_WIFI_BT, "Apalis iMX8QP 2GB WB", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 120 | { APALIS_IMX8QP, "Apalis iMX8QP 2GB", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 121 | { COLIBRI_IMX8QXP_IT, "Colibri iMX8QXP 2GB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, |
| 122 | { COLIBRI_IMX8DX_WIFI_BT, "Colibri iMX8DX 1GB WB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, |
| 123 | { COLIBRI_IMX8DX, "Colibri iMX8DX 1GB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, |
| 124 | { APALIS_IMX8QXP, "Apalis iMX8QXP 2GB ECC IT", 0 }, |
| 125 | { APALIS_IMX8DXP, "Apalis iMX8DXP 1GB", 0 }, |
| 126 | { VERDIN_IMX8MMQ_WIFI_BT_IT, "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 127 | { VERDIN_IMX8MNQ_WIFI_BT, "Verdin iMX8M Nano Quad 1GB WB", 0 }, |
| 128 | { VERDIN_IMX8MMDL, "Verdin iMX8M Mini DualLite 1GB", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 129 | { VERDIN_IMX8MPQ_WIFI_BT_IT, "Verdin iMX8M Plus Quad 4GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 130 | { VERDIN_IMX8MMQ_IT, "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 131 | { VERDIN_IMX8MMDL_WIFI_BT_IT, "Verdin iMX8M Mini DualLite 1GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 132 | { VERDIN_IMX8MPQ, "Verdin iMX8M Plus Quad 2GB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 133 | { COLIBRI_IMX6ULL_IT_EMMC, "Colibri iMX6ULL 1GB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, |
| 134 | { VERDIN_IMX8MPQ_IT, "Verdin iMX8M Plus Quad 4GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 135 | { VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, "Verdin iMX8M Plus Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 136 | { VERDIN_IMX8MPQL_IT, "Verdin iMX8M Plus QuadLite 1GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 137 | { VERDIN_IMX8MPQ_8GB_WIFI_BT, "Verdin iMX8M Plus Quad 8GB WB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 138 | { APALIS_IMX8QM_8GB_WIFI_BT_IT, "Apalis iMX8QM 8GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 139 | { VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN, "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 140 | { VERDIN_AM62Q_WIFI_BT_IT, "Verdin AM62 Quad 1GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 141 | { VERDIN_IMX8MPQ_8GB_WIFI_BT_IT, "Verdin iMX8M Plus Quad 8GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, |
| 142 | { VERDIN_AM62S_512MB, "Verdin AM62 Solo 512MB", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 143 | { VERDIN_AM62S_512MB_WIFI_BT_IT, "Verdin AM62 Solo 512MB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 144 | { VERDIN_AM62D_1G_ET, "Verdin AM62 Dual 1GB ET", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 145 | { VERDIN_AM62D_1G_IT, "Verdin AM62 Dual 1GB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 146 | { VERDIN_AM62D_1G_WIFI_BT_IT, "Verdin AM62 Dual 1GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 147 | { VERDIN_AM62Q_2G_WIFI_BT_IT, "Verdin AM62 Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, |
| 148 | { COLIBRI_IMX6S_NOWINCE, "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 149 | { COLIBRI_IMX6S_IT_NOWINCE, "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 150 | { COLIBRI_IMX6DL_NOWINCE, "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 151 | { COLIBRI_IMX6DL_IT_NOWINCE, "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, |
| 152 | { COLIBRI_IMX7D_NOWINCE, "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, |
| 153 | { APALIS_IMX6D_NOWINCE, "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 154 | { APALIS_IMX6Q_NOWINCE, "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 155 | { APALIS_IMX6D_IT_NOWINCE, "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 156 | { APALIS_IMX6Q_IT_NOWINCE, "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, |
| 157 | { VERDIN_IMX8MMDL_2G_IT, "Verdin iMX8M Mini DualLite 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 158 | { VERDIN_IMX8MMQ_2G_IT_NO_CAN, "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
| 159 | { AQUILA_AM69O_32G_WIFI_BT_IT, "Aquila AM69 Octa 32GB WB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) }, |
| 160 | { VERDIN_IMX95H_16G_WIFI_BT_IT, "Verdin iMX95 Hexa 16GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX95) }, |
| 161 | { VERDIN_IMX8MMQ_4G_WIFI_BT_ET, "Verdin iMX8M Mini Quad 4GB WB ET", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, |
Stefan Eichenberger | 6a2723d | 2024-12-11 13:18:53 +0100 | [diff] [blame^] | 162 | { APALIS_IMX8QM_WIFI_BT_IT_1300MHZ, "Apalis iMX8QM 4GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 163 | { APALIS_IMX8QM_IT_1300MHZ, "Apalis iMX8QM 4GB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 164 | { APALIS_IMX8QP_WIFI_BT_1300MHZ, "Apalis iMX8QP 2GB WB", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 165 | { APALIS_IMX8QP_1300MHZ, "Apalis iMX8QP 2GB", TARGET_IS_ENABLED(APALIS_IMX8) }, |
| 166 | { APALIS_IMX8QM_8GB_WIFI_BT_IT_1300MHZ, "Apalis iMX8QM 8GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 167 | }; |
| 168 | |
Max Krummenacher | 2ded2d6 | 2023-07-18 11:07:33 +0200 | [diff] [blame] | 169 | struct pid4list { |
| 170 | int pid4; |
| 171 | char * const name; |
Igor Opaniuk | 414df35 | 2020-07-15 13:30:54 +0300 | [diff] [blame] | 172 | }; |
| 173 | |
Max Krummenacher | 2ded2d6 | 2023-07-18 11:07:33 +0200 | [diff] [blame] | 174 | const struct pid4list toradex_carrier_boards[] = { |
| 175 | /* the code assumes unknown at index 0 */ |
| 176 | {0, "UNKNOWN CARRIER BOARD"}, |
| 177 | {DAHLIA, "Dahlia"}, |
| 178 | {VERDIN_DEVELOPMENT_BOARD, "Verdin Development Board"}, |
| 179 | {YAVIA, "Yavia"}, |
| 180 | }; |
| 181 | |
Max Krummenacher | cea0909 | 2023-07-18 11:07:34 +0200 | [diff] [blame] | 182 | const struct pid4list toradex_display_adapters[] = { |
| 183 | /* the code assumes unknown at index 0 */ |
| 184 | {0, "UNKNOWN DISPLAY ADAPTER"}, |
| 185 | {VERDIN_DSI_TO_HDMI_ADAPTER, "Verdin DSI to HDMI Adapter"}, |
| 186 | {VERDIN_DSI_TO_LVDS_ADAPTER, "Verdin DSI to LVDS Adapter"}, |
Igor Opaniuk | 414df35 | 2020-07-15 13:30:54 +0300 | [diff] [blame] | 187 | }; |
| 188 | |
Philippe Schenker | d52a257 | 2022-06-20 16:57:45 +0200 | [diff] [blame] | 189 | const u32 toradex_ouis[] = { |
| 190 | [0] = 0x00142dUL, |
| 191 | [1] = 0x8c06cbUL, |
| 192 | }; |
| 193 | |
Vitor Soares | 463a00c | 2024-11-25 17:49:10 +0000 | [diff] [blame] | 194 | int get_toradex_modules_idx(int pid4) |
| 195 | { |
| 196 | int i, index = 0; |
| 197 | |
| 198 | for (i = 1; i < ARRAY_SIZE(toradex_modules); i++) { |
| 199 | if (pid4 == toradex_modules[i].pid4) { |
| 200 | index = i; |
| 201 | break; |
| 202 | } |
| 203 | } |
| 204 | |
| 205 | return index; |
| 206 | } |
| 207 | |
Max Krummenacher | 2ded2d6 | 2023-07-18 11:07:33 +0200 | [diff] [blame] | 208 | const char * const get_toradex_carrier_boards(int pid4) |
| 209 | { |
| 210 | int i, index = 0; |
| 211 | |
| 212 | for (i = 1; i < ARRAY_SIZE(toradex_carrier_boards); i++) { |
| 213 | if (pid4 == toradex_carrier_boards[i].pid4) { |
| 214 | index = i; |
| 215 | break; |
| 216 | } |
| 217 | } |
| 218 | return toradex_carrier_boards[index].name; |
| 219 | } |
| 220 | |
Max Krummenacher | cea0909 | 2023-07-18 11:07:34 +0200 | [diff] [blame] | 221 | const char * const get_toradex_display_adapters(int pid4) |
| 222 | { |
| 223 | int i, index = 0; |
| 224 | |
| 225 | for (i = 1; i < ARRAY_SIZE(toradex_display_adapters); i++) { |
| 226 | if (pid4 == toradex_display_adapters[i].pid4) { |
| 227 | index = i; |
| 228 | break; |
| 229 | } |
| 230 | } |
| 231 | return toradex_display_adapters[index].name; |
| 232 | } |
| 233 | |
Philippe Schenker | d52a257 | 2022-06-20 16:57:45 +0200 | [diff] [blame] | 234 | static u32 get_serial_from_mac(struct toradex_eth_addr *eth_addr) |
| 235 | { |
| 236 | int i; |
| 237 | u32 oui = ntohl(eth_addr->oui) >> 8; |
| 238 | u32 nic = ntohl(eth_addr->nic) >> 8; |
| 239 | |
| 240 | for (i = 0; i < ARRAY_SIZE(toradex_ouis); i++) { |
| 241 | if (toradex_ouis[i] == oui) |
| 242 | break; |
| 243 | } |
| 244 | |
| 245 | return (u32)((i << 24) + nic); |
| 246 | } |
| 247 | |
| 248 | void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr) |
| 249 | { |
| 250 | u8 oui_index = tdx_serial >> 24; |
| 251 | u32 nic = tdx_serial & GENMASK(23, 0); |
| 252 | u32 oui; |
| 253 | |
| 254 | if (oui_index >= ARRAY_SIZE(toradex_ouis)) { |
| 255 | puts("Can't find OUI for this serial#\n"); |
| 256 | oui_index = 0; |
| 257 | } |
| 258 | |
| 259 | oui = toradex_ouis[oui_index]; |
| 260 | |
| 261 | eth_addr->oui = htonl(oui << 8); |
| 262 | eth_addr->nic = htonl(nic << 8); |
| 263 | } |
| 264 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 265 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC |
| 266 | static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) |
| 267 | { |
| 268 | struct mmc *mmc; |
| 269 | int dev = CONFIG_TDX_CFG_BLOCK_DEV; |
| 270 | int offset = CONFIG_TDX_CFG_BLOCK_OFFSET; |
| 271 | uint part = CONFIG_TDX_CFG_BLOCK_PART; |
| 272 | uint blk_start; |
| 273 | int ret = 0; |
| 274 | |
| 275 | /* Read production parameter config block from eMMC */ |
| 276 | mmc = find_mmc_device(dev); |
| 277 | if (!mmc) { |
| 278 | puts("No MMC card found\n"); |
| 279 | ret = -ENODEV; |
| 280 | goto out; |
| 281 | } |
Stefan Agner | dd20234 | 2019-07-12 12:35:05 +0200 | [diff] [blame] | 282 | if (mmc_init(mmc)) { |
| 283 | puts("MMC init failed\n"); |
| 284 | return -EINVAL; |
| 285 | } |
Simon Glass | 8c4c5c8 | 2017-04-23 20:02:11 -0600 | [diff] [blame] | 286 | if (part != mmc_get_blk_desc(mmc)->hwpart) { |
Simon Glass | dbfa32c | 2022-08-11 19:34:59 -0600 | [diff] [blame] | 287 | if (blk_select_hwpart_devnum(UCLASS_MMC, dev, part)) { |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 288 | puts("MMC partition switch failed\n"); |
| 289 | ret = -ENODEV; |
| 290 | goto out; |
| 291 | } |
| 292 | } |
| 293 | if (offset < 0) |
| 294 | offset += mmc->capacity; |
| 295 | blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len; |
| 296 | |
| 297 | if (!write) { |
| 298 | /* Careful reads a whole block of 512 bytes into config_block */ |
| 299 | if (blk_dread(mmc_get_blk_desc(mmc), blk_start, 1, |
| 300 | (unsigned char *)config_block) != 1) { |
| 301 | ret = -EIO; |
| 302 | goto out; |
| 303 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 304 | } else { |
| 305 | /* Just writing one 512 byte block */ |
| 306 | if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1, |
| 307 | (unsigned char *)config_block) != 1) { |
| 308 | ret = -EIO; |
| 309 | goto out; |
| 310 | } |
| 311 | } |
| 312 | |
| 313 | out: |
| 314 | /* Switch back to regular eMMC user partition */ |
Simon Glass | dbfa32c | 2022-08-11 19:34:59 -0600 | [diff] [blame] | 315 | blk_select_hwpart_devnum(UCLASS_MMC, 0, 0); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 316 | |
| 317 | return ret; |
| 318 | } |
| 319 | #endif |
| 320 | |
| 321 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NAND |
| 322 | static int read_tdx_cfg_block_from_nand(unsigned char *config_block) |
| 323 | { |
| 324 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
Stefan Agner | 8843b6d | 2018-08-06 09:19:18 +0200 | [diff] [blame] | 325 | struct mtd_info *mtd = get_nand_dev_by_index(0); |
| 326 | |
| 327 | if (!mtd) |
| 328 | return -ENODEV; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 329 | |
| 330 | /* Read production parameter config block from NAND page */ |
Stefan Agner | 8843b6d | 2018-08-06 09:19:18 +0200 | [diff] [blame] | 331 | return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET, |
Grygorii Strashko | bb31462 | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 332 | &size, NULL, TDX_CFG_BLOCK_MAX_SIZE, |
| 333 | config_block); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 334 | } |
| 335 | |
| 336 | static int write_tdx_cfg_block_to_nand(unsigned char *config_block) |
| 337 | { |
| 338 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 339 | |
| 340 | /* Write production parameter config block to NAND page */ |
Grygorii Strashko | bb31462 | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 341 | return nand_write_skip_bad(get_nand_dev_by_index(0), |
| 342 | CONFIG_TDX_CFG_BLOCK_OFFSET, |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 343 | &size, NULL, TDX_CFG_BLOCK_MAX_SIZE, |
| 344 | config_block, WITH_WR_VERIFY); |
| 345 | } |
| 346 | #endif |
| 347 | |
| 348 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR |
| 349 | static int read_tdx_cfg_block_from_nor(unsigned char *config_block) |
| 350 | { |
| 351 | /* Read production parameter config block from NOR flash */ |
| 352 | memcpy(config_block, (void *)CONFIG_TDX_CFG_BLOCK_OFFSET, |
| 353 | TDX_CFG_BLOCK_MAX_SIZE); |
| 354 | return 0; |
| 355 | } |
| 356 | |
| 357 | static int write_tdx_cfg_block_to_nor(unsigned char *config_block) |
| 358 | { |
| 359 | /* Write production parameter config block to NOR flash */ |
| 360 | return flash_write((void *)config_block, CONFIG_TDX_CFG_BLOCK_OFFSET, |
| 361 | TDX_CFG_BLOCK_MAX_SIZE); |
| 362 | } |
| 363 | #endif |
| 364 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 365 | #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM |
| 366 | static int read_tdx_cfg_block_from_eeprom(unsigned char *config_block) |
| 367 | { |
| 368 | return read_tdx_eeprom_data(TDX_EEPROM_ID_MODULE, 0x0, config_block, |
| 369 | TDX_CFG_BLOCK_MAX_SIZE); |
| 370 | } |
| 371 | |
| 372 | static int write_tdx_cfg_block_to_eeprom(unsigned char *config_block) |
| 373 | { |
| 374 | return write_tdx_eeprom_data(TDX_EEPROM_ID_MODULE, 0x0, config_block, |
| 375 | TDX_CFG_BLOCK_MAX_SIZE); |
| 376 | } |
| 377 | #endif |
| 378 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 379 | int read_tdx_cfg_block(void) |
| 380 | { |
Vitor Soares | 463a00c | 2024-11-25 17:49:10 +0000 | [diff] [blame] | 381 | int idx, ret = 0; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 382 | u8 *config_block = NULL; |
| 383 | struct toradex_tag *tag; |
| 384 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 385 | int offset; |
| 386 | |
| 387 | /* Allocate RAM area for config block */ |
| 388 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 389 | if (!config_block) { |
| 390 | printf("Not enough malloc space available!\n"); |
| 391 | return -ENOMEM; |
| 392 | } |
| 393 | |
| 394 | memset(config_block, 0, size); |
| 395 | |
| 396 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 397 | ret = tdx_cfg_block_mmc_storage(config_block, 0); |
| 398 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 399 | ret = read_tdx_cfg_block_from_nand(config_block); |
| 400 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 401 | ret = read_tdx_cfg_block_from_nor(config_block); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 402 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM) |
| 403 | ret = read_tdx_cfg_block_from_eeprom(config_block); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 404 | #else |
| 405 | ret = -EINVAL; |
| 406 | #endif |
| 407 | if (ret) |
| 408 | goto out; |
| 409 | |
| 410 | /* Expect a valid tag first */ |
| 411 | tag = (struct toradex_tag *)config_block; |
| 412 | if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) { |
| 413 | valid_cfgblock = false; |
| 414 | ret = -EINVAL; |
| 415 | goto out; |
| 416 | } |
| 417 | valid_cfgblock = true; |
| 418 | offset = 4; |
| 419 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 420 | /* |
| 421 | * check if there is enough space for storing tag and value of the |
| 422 | * biggest element |
| 423 | */ |
| 424 | while (offset + sizeof(struct toradex_tag) + |
| 425 | sizeof(struct toradex_hw) < TDX_CFG_BLOCK_MAX_SIZE) { |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 426 | tag = (struct toradex_tag *)(config_block + offset); |
| 427 | offset += 4; |
| 428 | if (tag->id == TAG_INVALID) |
| 429 | break; |
| 430 | |
| 431 | if (tag->flags == TAG_FLAG_VALID) { |
| 432 | switch (tag->id) { |
| 433 | case TAG_MAC: |
| 434 | memcpy(&tdx_eth_addr, config_block + offset, |
| 435 | 6); |
| 436 | |
Philippe Schenker | d52a257 | 2022-06-20 16:57:45 +0200 | [diff] [blame] | 437 | tdx_serial = get_serial_from_mac(&tdx_eth_addr); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 438 | break; |
| 439 | case TAG_HW: |
| 440 | memcpy(&tdx_hw_tag, config_block + offset, 8); |
| 441 | break; |
| 442 | } |
| 443 | } |
| 444 | |
| 445 | /* Get to next tag according to current tags length */ |
| 446 | offset += tag->len * 4; |
| 447 | } |
| 448 | |
| 449 | /* Cap product id to avoid issues with a yet unknown one */ |
Vitor Soares | 463a00c | 2024-11-25 17:49:10 +0000 | [diff] [blame] | 450 | idx = get_toradex_modules_idx(tdx_hw_tag.prodid); |
| 451 | if (!toradex_modules[idx].pid4) |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 452 | tdx_hw_tag.prodid = 0; |
| 453 | |
| 454 | out: |
| 455 | free(config_block); |
| 456 | return ret; |
| 457 | } |
| 458 | |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 459 | static int parse_assembly_string(char *string_to_parse, u16 *assembly) |
| 460 | { |
| 461 | if (string_to_parse[3] >= 'A' && string_to_parse[3] <= 'Z') |
| 462 | *assembly = string_to_parse[3] - 'A'; |
| 463 | else if (string_to_parse[3] == '#') |
| 464 | *assembly = dectoul(&string_to_parse[4], NULL); |
| 465 | else |
| 466 | return -EINVAL; |
| 467 | |
| 468 | return 0; |
| 469 | } |
| 470 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 471 | static int get_cfgblock_interactive(void) |
| 472 | { |
| 473 | char message[CONFIG_SYS_CBSIZE]; |
Marcel Ziswiler | eca26ba | 2020-01-28 14:42:24 +0100 | [diff] [blame] | 474 | int len = 0; |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 475 | int ret = 0; |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 476 | unsigned int prodid; |
Vitor Soares | 463a00c | 2024-11-25 17:49:10 +0000 | [diff] [blame] | 477 | int i, idx; |
Philippe Schenker | 48b3703 | 2022-05-09 18:58:15 +0200 | [diff] [blame] | 478 | |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 479 | printf("Enabled modules:\n"); |
| 480 | for (i = 0; i < ARRAY_SIZE(toradex_modules); i++) { |
| 481 | if (toradex_modules[i].is_enabled) |
Vitor Soares | 463a00c | 2024-11-25 17:49:10 +0000 | [diff] [blame] | 482 | printf(" %04d %s\n", toradex_modules[i].pid4, |
| 483 | toradex_modules[i].name); |
Philippe Schenker | 48b3703 | 2022-05-09 18:58:15 +0200 | [diff] [blame] | 484 | } |
Marcel Ziswiler | 35e3c6e | 2019-07-12 12:35:06 +0200 | [diff] [blame] | 485 | |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 486 | sprintf(message, "Enter the module ID: "); |
| 487 | len = cli_readline(message); |
Stefan Agner | 68f5878 | 2019-04-09 17:24:08 +0200 | [diff] [blame] | 488 | |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 489 | prodid = dectoul(console_buffer, NULL); |
Vitor Soares | 463a00c | 2024-11-25 17:49:10 +0000 | [diff] [blame] | 490 | idx = get_toradex_modules_idx(prodid); |
| 491 | if (!toradex_modules[idx].pid4 || !toradex_modules[idx].is_enabled) { |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 492 | printf("Parsing module id failed\n"); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 493 | return -1; |
| 494 | } |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 495 | tdx_hw_tag.prodid = prodid; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 496 | |
Francesco Dolcini | fed3bc7 | 2022-07-21 15:17:34 +0200 | [diff] [blame] | 497 | len = 0; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 498 | while (len < 4) { |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 499 | sprintf(message, "Enter the module version (e.g. V1.1B or V1.1#26): V"); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 500 | len = cli_readline(message); |
| 501 | } |
| 502 | |
| 503 | tdx_hw_tag.ver_major = console_buffer[0] - '0'; |
| 504 | tdx_hw_tag.ver_minor = console_buffer[2] - '0'; |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 505 | |
| 506 | ret = parse_assembly_string(console_buffer, &tdx_hw_tag.ver_assembly); |
| 507 | if (ret) { |
| 508 | printf("Parsing module version failed\n"); |
| 509 | return ret; |
| 510 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 511 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 512 | while (len < 8) { |
| 513 | sprintf(message, "Enter module serial number: "); |
| 514 | len = cli_readline(message); |
| 515 | } |
| 516 | |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 517 | tdx_serial = dectoul(console_buffer, NULL); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 518 | |
| 519 | return 0; |
| 520 | } |
| 521 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 522 | static int get_cfgblock_barcode(char *barcode, struct toradex_hw *tag, |
| 523 | u32 *serial) |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 524 | { |
Denys Drozdov | 3a1c657 | 2021-04-07 15:28:24 +0300 | [diff] [blame] | 525 | char revision[3] = {barcode[6], barcode[7], '\0'}; |
| 526 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 527 | if (strlen(barcode) < 16) { |
| 528 | printf("Argument too short, barcode is 16 chars long\n"); |
| 529 | return -1; |
| 530 | } |
| 531 | |
| 532 | /* Get hardware information from the first 8 digits */ |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 533 | tag->ver_major = barcode[4] - '0'; |
| 534 | tag->ver_minor = barcode[5] - '0'; |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 535 | tag->ver_assembly = dectoul(revision, NULL); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 536 | |
| 537 | barcode[4] = '\0'; |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 538 | tag->prodid = dectoul(barcode, NULL); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 539 | |
| 540 | /* Parse second part of the barcode (serial number */ |
| 541 | barcode += 8; |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 542 | *serial = dectoul(barcode, NULL); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 543 | |
| 544 | return 0; |
| 545 | } |
| 546 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 547 | static int write_tag(u8 *config_block, int *offset, int tag_id, |
| 548 | u8 *tag_data, size_t tag_data_size) |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 549 | { |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 550 | struct toradex_tag *tag; |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 551 | |
| 552 | if (!offset || !config_block) |
| 553 | return -EINVAL; |
| 554 | |
| 555 | tag = (struct toradex_tag *)(config_block + *offset); |
| 556 | tag->id = tag_id; |
| 557 | tag->flags = TAG_FLAG_VALID; |
| 558 | /* len is provided as number of 32bit values after the tag */ |
| 559 | tag->len = (tag_data_size + sizeof(u32) - 1) / sizeof(u32); |
| 560 | *offset += sizeof(struct toradex_tag); |
| 561 | if (tag_data && tag_data_size) { |
| 562 | memcpy(config_block + *offset, tag_data, |
| 563 | tag_data_size); |
| 564 | *offset += tag_data_size; |
| 565 | } |
| 566 | |
| 567 | return 0; |
| 568 | } |
| 569 | |
| 570 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 571 | int read_tdx_cfg_block_carrier(void) |
| 572 | { |
| 573 | int ret = 0; |
| 574 | u8 *config_block = NULL; |
| 575 | struct toradex_tag *tag; |
| 576 | size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE; |
| 577 | int offset; |
| 578 | |
| 579 | /* Allocate RAM area for carrier config block */ |
| 580 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 581 | if (!config_block) { |
| 582 | printf("Not enough malloc space available!\n"); |
| 583 | return -ENOMEM; |
| 584 | } |
| 585 | |
| 586 | memset(config_block, 0, size); |
| 587 | |
| 588 | ret = read_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block, |
| 589 | size); |
| 590 | if (ret) |
| 591 | return ret; |
| 592 | |
| 593 | /* Expect a valid tag first */ |
| 594 | tag = (struct toradex_tag *)config_block; |
| 595 | if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) { |
| 596 | valid_cfgblock_carrier = false; |
| 597 | ret = -EINVAL; |
| 598 | goto out; |
| 599 | } |
| 600 | valid_cfgblock_carrier = true; |
| 601 | offset = 4; |
| 602 | |
| 603 | while (offset + sizeof(struct toradex_tag) + |
| 604 | sizeof(struct toradex_hw) < TDX_CFG_BLOCK_MAX_SIZE) { |
| 605 | tag = (struct toradex_tag *)(config_block + offset); |
| 606 | offset += 4; |
| 607 | if (tag->id == TAG_INVALID) |
| 608 | break; |
| 609 | |
| 610 | if (tag->flags == TAG_FLAG_VALID) { |
| 611 | switch (tag->id) { |
| 612 | case TAG_CAR_SERIAL: |
| 613 | memcpy(&tdx_car_serial, config_block + offset, |
| 614 | sizeof(tdx_car_serial)); |
| 615 | break; |
| 616 | case TAG_HW: |
| 617 | memcpy(&tdx_car_hw_tag, config_block + |
| 618 | offset, 8); |
| 619 | break; |
| 620 | } |
| 621 | } |
| 622 | |
| 623 | /* Get to next tag according to current tags length */ |
| 624 | offset += tag->len * 4; |
| 625 | } |
| 626 | out: |
| 627 | free(config_block); |
| 628 | return ret; |
| 629 | } |
| 630 | |
Igor Opaniuk | e9ad67a | 2020-07-15 13:30:56 +0300 | [diff] [blame] | 631 | int check_pid8_sanity(char *pid8) |
| 632 | { |
| 633 | char s_carrierid_verdin_dev[5]; |
| 634 | char s_carrierid_dahlia[5]; |
| 635 | |
| 636 | sprintf(s_carrierid_verdin_dev, "0%d", VERDIN_DEVELOPMENT_BOARD); |
| 637 | sprintf(s_carrierid_dahlia, "0%d", DAHLIA); |
| 638 | |
| 639 | /* sane value check, first 4 chars which represent carrier id */ |
| 640 | if (!strncmp(pid8, s_carrierid_verdin_dev, 4)) |
| 641 | return 0; |
| 642 | |
| 643 | if (!strncmp(pid8, s_carrierid_dahlia, 4)) |
| 644 | return 0; |
| 645 | |
| 646 | return -EINVAL; |
| 647 | } |
| 648 | |
| 649 | int try_migrate_tdx_cfg_block_carrier(void) |
| 650 | { |
| 651 | char pid8[8]; |
| 652 | int offset = 0; |
| 653 | int ret = CMD_RET_SUCCESS; |
| 654 | size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE; |
| 655 | u8 *config_block; |
| 656 | |
| 657 | memset(pid8, 0x0, 8); |
| 658 | ret = read_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, (u8 *)pid8, 8); |
| 659 | if (ret) |
| 660 | return ret; |
| 661 | |
| 662 | if (check_pid8_sanity(pid8)) |
| 663 | return -EINVAL; |
| 664 | |
| 665 | /* Allocate RAM area for config block */ |
| 666 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 667 | if (!config_block) { |
| 668 | printf("Not enough malloc space available!\n"); |
| 669 | return CMD_RET_FAILURE; |
| 670 | } |
| 671 | |
| 672 | memset(config_block, 0xff, size); |
| 673 | /* we try parse PID8 concatenating zeroed serial number */ |
| 674 | tdx_car_hw_tag.ver_major = pid8[4] - '0'; |
| 675 | tdx_car_hw_tag.ver_minor = pid8[5] - '0'; |
| 676 | tdx_car_hw_tag.ver_assembly = pid8[7] - '0'; |
| 677 | |
| 678 | pid8[4] = '\0'; |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 679 | tdx_car_hw_tag.prodid = dectoul(pid8, NULL); |
Igor Opaniuk | e9ad67a | 2020-07-15 13:30:56 +0300 | [diff] [blame] | 680 | |
| 681 | /* Valid Tag */ |
| 682 | write_tag(config_block, &offset, TAG_VALID, NULL, 0); |
| 683 | |
| 684 | /* Product Tag */ |
| 685 | write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_car_hw_tag, |
| 686 | sizeof(tdx_car_hw_tag)); |
| 687 | |
| 688 | /* Serial Tag */ |
| 689 | write_tag(config_block, &offset, TAG_CAR_SERIAL, (u8 *)&tdx_car_serial, |
| 690 | sizeof(tdx_car_serial)); |
| 691 | |
| 692 | memset(config_block + offset, 0, 32 - offset); |
| 693 | ret = write_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block, |
| 694 | size); |
| 695 | if (ret) { |
| 696 | printf("Failed to write Toradex Extra config block: %d\n", |
| 697 | ret); |
| 698 | ret = CMD_RET_FAILURE; |
| 699 | goto out; |
| 700 | } |
| 701 | |
| 702 | printf("Successfully migrated to Toradex Config Block from PID8\n"); |
| 703 | |
| 704 | out: |
| 705 | free(config_block); |
| 706 | return ret; |
| 707 | } |
| 708 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 709 | static int get_cfgblock_carrier_interactive(void) |
| 710 | { |
| 711 | char message[CONFIG_SYS_CBSIZE]; |
| 712 | int len; |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 713 | int ret = 0; |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 714 | |
| 715 | printf("Supported carrier boards:\n"); |
Max Krummenacher | 2ded2d6 | 2023-07-18 11:07:33 +0200 | [diff] [blame] | 716 | printf("%30s\t[ID]\n", "CARRIER BOARD NAME"); |
Francesco Dolcini | 2dc6814 | 2022-07-21 15:17:33 +0200 | [diff] [blame] | 717 | for (int i = 0; i < ARRAY_SIZE(toradex_carrier_boards); i++) |
Max Krummenacher | 2ded2d6 | 2023-07-18 11:07:33 +0200 | [diff] [blame] | 718 | printf("%30s\t[%d]\n", |
| 719 | toradex_carrier_boards[i].name, |
| 720 | toradex_carrier_boards[i].pid4); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 721 | |
| 722 | sprintf(message, "Choose your carrier board (provide ID): "); |
| 723 | len = cli_readline(message); |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 724 | tdx_car_hw_tag.prodid = dectoul(console_buffer, NULL); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 725 | |
| 726 | do { |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 727 | sprintf(message, "Enter carrier board version (e.g. V1.1B or V1.1#26): V"); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 728 | len = cli_readline(message); |
| 729 | } while (len < 4); |
| 730 | |
| 731 | tdx_car_hw_tag.ver_major = console_buffer[0] - '0'; |
| 732 | tdx_car_hw_tag.ver_minor = console_buffer[2] - '0'; |
Philippe Schenker | 498f95a | 2022-06-13 19:35:23 +0200 | [diff] [blame] | 733 | |
| 734 | ret = parse_assembly_string(console_buffer, &tdx_car_hw_tag.ver_assembly); |
| 735 | if (ret) { |
| 736 | printf("Parsing module version failed\n"); |
| 737 | return ret; |
| 738 | } |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 739 | |
| 740 | while (len < 8) { |
| 741 | sprintf(message, "Enter carrier board serial number: "); |
| 742 | len = cli_readline(message); |
| 743 | } |
| 744 | |
Simon Glass | ff9b903 | 2021-07-24 09:03:30 -0600 | [diff] [blame] | 745 | tdx_car_serial = dectoul(console_buffer, NULL); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 746 | |
| 747 | return 0; |
| 748 | } |
| 749 | |
| 750 | static int do_cfgblock_carrier_create(struct cmd_tbl *cmdtp, int flag, int argc, |
| 751 | char * const argv[]) |
| 752 | { |
| 753 | u8 *config_block; |
| 754 | size_t size = TDX_CFG_BLOCK_EXTRA_MAX_SIZE; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 755 | int offset = 0; |
| 756 | int ret = CMD_RET_SUCCESS; |
| 757 | int err; |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 758 | int force_overwrite = 0; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 759 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 760 | if (argc >= 3) { |
| 761 | if (argv[2][0] == '-' && argv[2][1] == 'y') |
| 762 | force_overwrite = 1; |
| 763 | } |
| 764 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 765 | /* Allocate RAM area for config block */ |
| 766 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 767 | if (!config_block) { |
| 768 | printf("Not enough malloc space available!\n"); |
| 769 | return CMD_RET_FAILURE; |
| 770 | } |
| 771 | |
| 772 | memset(config_block, 0xff, size); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 773 | read_tdx_cfg_block_carrier(); |
| 774 | if (valid_cfgblock_carrier && !force_overwrite) { |
| 775 | char message[CONFIG_SYS_CBSIZE]; |
| 776 | |
| 777 | sprintf(message, "A valid Toradex Carrier config block is present, still recreate? [y/N] "); |
| 778 | |
| 779 | if (!cli_readline(message)) |
| 780 | goto out; |
| 781 | |
| 782 | if (console_buffer[0] != 'y' && |
| 783 | console_buffer[0] != 'Y') |
| 784 | goto out; |
| 785 | } |
| 786 | |
| 787 | if (argc < 3 || (force_overwrite && argc < 4)) { |
| 788 | err = get_cfgblock_carrier_interactive(); |
| 789 | } else { |
| 790 | if (force_overwrite) |
| 791 | err = get_cfgblock_barcode(argv[3], &tdx_car_hw_tag, |
| 792 | &tdx_car_serial); |
| 793 | else |
| 794 | err = get_cfgblock_barcode(argv[2], &tdx_car_hw_tag, |
| 795 | &tdx_car_serial); |
| 796 | } |
| 797 | |
| 798 | if (err) { |
| 799 | ret = CMD_RET_FAILURE; |
| 800 | goto out; |
| 801 | } |
| 802 | |
| 803 | /* Valid Tag */ |
| 804 | write_tag(config_block, &offset, TAG_VALID, NULL, 0); |
| 805 | |
| 806 | /* Product Tag */ |
| 807 | write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_car_hw_tag, |
| 808 | sizeof(tdx_car_hw_tag)); |
| 809 | |
| 810 | /* Serial Tag */ |
| 811 | write_tag(config_block, &offset, TAG_CAR_SERIAL, (u8 *)&tdx_car_serial, |
| 812 | sizeof(tdx_car_serial)); |
| 813 | |
| 814 | memset(config_block + offset, 0, 32 - offset); |
| 815 | err = write_tdx_eeprom_data(TDX_EEPROM_ID_CARRIER, 0x0, config_block, |
| 816 | size); |
| 817 | if (err) { |
| 818 | printf("Failed to write Toradex Extra config block: %d\n", |
| 819 | ret); |
| 820 | ret = CMD_RET_FAILURE; |
| 821 | goto out; |
| 822 | } |
| 823 | |
| 824 | printf("Toradex Extra config block successfully written\n"); |
| 825 | |
| 826 | out: |
| 827 | free(config_block); |
| 828 | return ret; |
| 829 | } |
| 830 | |
| 831 | #endif /* CONFIG_TDX_CFG_BLOCK_EXTRA */ |
| 832 | |
| 833 | static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc, |
| 834 | char * const argv[]) |
| 835 | { |
| 836 | u8 *config_block; |
| 837 | size_t size = TDX_CFG_BLOCK_MAX_SIZE; |
| 838 | int offset = 0; |
| 839 | int ret = CMD_RET_SUCCESS; |
| 840 | int err; |
| 841 | int force_overwrite = 0; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 842 | |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 843 | if (argc >= 3) { |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 844 | #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA |
| 845 | if (!strcmp(argv[2], "carrier")) |
| 846 | return do_cfgblock_carrier_create(cmdtp, flag, |
| 847 | --argc, ++argv); |
| 848 | #endif /* CONFIG_TDX_CFG_BLOCK_EXTRA */ |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 849 | if (argv[2][0] == '-' && argv[2][1] == 'y') |
| 850 | force_overwrite = 1; |
| 851 | } |
| 852 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 853 | /* Allocate RAM area for config block */ |
| 854 | config_block = memalign(ARCH_DMA_MINALIGN, size); |
| 855 | if (!config_block) { |
| 856 | printf("Not enough malloc space available!\n"); |
| 857 | return CMD_RET_FAILURE; |
| 858 | } |
| 859 | |
| 860 | memset(config_block, 0xff, size); |
| 861 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 862 | read_tdx_cfg_block(); |
| 863 | if (valid_cfgblock) { |
| 864 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 865 | /* |
| 866 | * On NAND devices, recreation is only allowed if the page is |
| 867 | * empty (config block invalid...) |
| 868 | */ |
Marcel Ziswiler | 6cf2f78 | 2019-07-12 12:35:09 +0200 | [diff] [blame] | 869 | printf("NAND erase block %d need to be erased before creating a Toradex config block\n", |
Grygorii Strashko | bb31462 | 2017-06-26 19:13:06 -0500 | [diff] [blame] | 870 | CONFIG_TDX_CFG_BLOCK_OFFSET / |
| 871 | get_nand_dev_by_index(0)->erasesize); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 872 | goto out; |
| 873 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 874 | /* |
| 875 | * On NOR devices, recreation is only allowed if the sector is |
| 876 | * empty and write protection is off (config block invalid...) |
| 877 | */ |
Marcel Ziswiler | 6cf2f78 | 2019-07-12 12:35:09 +0200 | [diff] [blame] | 878 | printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n", |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 879 | CONFIG_TDX_CFG_BLOCK_OFFSET); |
| 880 | goto out; |
| 881 | #else |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 882 | if (!force_overwrite) { |
| 883 | char message[CONFIG_SYS_CBSIZE]; |
| 884 | |
| 885 | sprintf(message, |
| 886 | "A valid Toradex config block is present, still recreate? [y/N] "); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 887 | |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 888 | if (!cli_readline(message)) |
| 889 | goto out; |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 890 | |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 891 | if (console_buffer[0] != 'y' && |
| 892 | console_buffer[0] != 'Y') |
| 893 | goto out; |
| 894 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 895 | #endif |
| 896 | } |
| 897 | |
| 898 | /* Parse new Toradex config block data... */ |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 899 | if (argc < 3 || (force_overwrite && argc < 4)) { |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 900 | err = get_cfgblock_interactive(); |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 901 | } else { |
| 902 | if (force_overwrite) |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 903 | err = get_cfgblock_barcode(argv[3], &tdx_hw_tag, |
| 904 | &tdx_serial); |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 905 | else |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 906 | err = get_cfgblock_barcode(argv[2], &tdx_hw_tag, |
| 907 | &tdx_serial); |
Dominik Sliwa | f1e1059 | 2019-03-25 17:18:27 +0100 | [diff] [blame] | 908 | } |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 909 | if (err) { |
| 910 | ret = CMD_RET_FAILURE; |
| 911 | goto out; |
| 912 | } |
| 913 | |
| 914 | /* Convert serial number to MAC address (the storage format) */ |
Philippe Schenker | d52a257 | 2022-06-20 16:57:45 +0200 | [diff] [blame] | 915 | get_mac_from_serial(tdx_serial, &tdx_eth_addr); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 916 | |
| 917 | /* Valid Tag */ |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 918 | write_tag(config_block, &offset, TAG_VALID, NULL, 0); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 919 | |
| 920 | /* Product Tag */ |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 921 | write_tag(config_block, &offset, TAG_HW, (u8 *)&tdx_hw_tag, |
| 922 | sizeof(tdx_hw_tag)); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 923 | |
| 924 | /* MAC Tag */ |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 925 | write_tag(config_block, &offset, TAG_MAC, (u8 *)&tdx_eth_addr, |
| 926 | sizeof(tdx_eth_addr)); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 927 | |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 928 | memset(config_block + offset, 0, 32 - offset); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 929 | #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC) |
| 930 | err = tdx_cfg_block_mmc_storage(config_block, 1); |
| 931 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) |
| 932 | err = write_tdx_cfg_block_to_nand(config_block); |
| 933 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR) |
| 934 | err = write_tdx_cfg_block_to_nor(config_block); |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 935 | #elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_EEPROM) |
| 936 | err = write_tdx_cfg_block_to_eeprom(config_block); |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 937 | #else |
| 938 | err = -EINVAL; |
| 939 | #endif |
| 940 | if (err) { |
| 941 | printf("Failed to write Toradex config block: %d\n", ret); |
| 942 | ret = CMD_RET_FAILURE; |
| 943 | goto out; |
| 944 | } |
| 945 | |
| 946 | printf("Toradex config block successfully written\n"); |
| 947 | |
| 948 | out: |
| 949 | free(config_block); |
| 950 | return ret; |
| 951 | } |
| 952 | |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 953 | static int do_cfgblock(struct cmd_tbl *cmdtp, int flag, int argc, |
| 954 | char *const argv[]) |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 955 | { |
| 956 | int ret; |
| 957 | |
| 958 | if (argc < 2) |
| 959 | return CMD_RET_USAGE; |
| 960 | |
| 961 | if (!strcmp(argv[1], "create")) { |
| 962 | return do_cfgblock_create(cmdtp, flag, argc, argv); |
| 963 | } else if (!strcmp(argv[1], "reload")) { |
| 964 | ret = read_tdx_cfg_block(); |
| 965 | if (ret) { |
| 966 | printf("Failed to reload Toradex config block: %d\n", |
| 967 | ret); |
| 968 | return CMD_RET_FAILURE; |
| 969 | } |
| 970 | return CMD_RET_SUCCESS; |
| 971 | } |
| 972 | |
| 973 | return CMD_RET_USAGE; |
| 974 | } |
| 975 | |
Igor Opaniuk | 67c9bfc | 2020-07-15 13:30:55 +0300 | [diff] [blame] | 976 | U_BOOT_CMD( |
| 977 | cfgblock, 5, 0, do_cfgblock, |
| 978 | "Toradex config block handling commands", |
| 979 | "create [-y] [barcode] - (Re-)create Toradex config block\n" |
| 980 | "create carrier [-y] [barcode] - (Re-)create Toradex Carrier config block\n" |
| 981 | "cfgblock reload - Reload Toradex config block from flash" |
Marcel Ziswiler | 7a28dfc | 2016-11-16 17:49:22 +0100 | [diff] [blame] | 982 | ); |