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git01.mediatek.com / filogic / uboot / 6a099ccb0f31d187fbc1d5570d895df527e88d94 / . / include / configs / mx6_common.h
blob: 2b8ce9d71d007d1a6093e103eb3ae49874115fbd [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
Stephen Warren57ab23f2013-02-26 12:28:29 +0000[diff] [blame]2/*
3 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
Stephen Warren57ab23f2013-02-26 12:28:29 +0000[diff] [blame]4 */
5
6#ifndef __MX6_COMMON_H
7#define __MX6_COMMON_H
8
Stefan Agnerbe8b7c52018-01-05 15:08:19 +0100[diff] [blame]9#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
10#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
11#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
12#else
Fabio Estevam13409292014-01-29 17:39:49 -0200[diff] [blame]13#ifndef CONFIG_SYS_L2CACHE_OFF
14#define CONFIG_SYS_L2_PL310
15#define CONFIG_SYS_PL310_BASE L2_PL310_BASE
16#endif
17
Peng Fand2d4fcb2015-07-20 19:28:26 +0800[diff] [blame]18#endif
19#define CONFIG_BOARD_POSTCLK_INIT
Ye.Li2b7f8772014-10-30 18:20:59 +0800[diff] [blame]20#define CONFIG_MXC_GPT_HCLK
Gabriel Huau170ceaf2014-07-26 11:35:43 -0700[diff] [blame]21
Peng Fan3783b9b2016-01-04 15:27:22 +0800[diff] [blame]22#define CONFIG_SYS_BOOTM_LEN 0x1000000
23
Peter Robinson4b671502015-05-22 17:30:45 +0100[diff] [blame]24#include <linux/sizes.h>
25#include <asm/arch/imx-regs.h>
Stefano Babic33731bc2017-06-29 10:16:06 +0200[diff] [blame]26#include <asm/mach-imx/gpio.h>
Peter Robinson4b671502015-05-22 17:30:45 +0100[diff] [blame]27
Peter Robinsone193ff22015-05-22 17:30:46 +0100[diff] [blame]28#ifndef CONFIG_MX6
29#define CONFIG_MX6
30#endif
31
Gong Qianyu52de2e52015-10-26 19:47:42 +0800[diff] [blame]32#define CONFIG_SYS_FSL_CLK
Peter Robinsone193ff22015-05-22 17:30:46 +0100[diff] [blame]33
Peter Robinson3028f622015-05-22 17:30:47 +0100[diff] [blame]34/* ATAGs */
35#define CONFIG_CMDLINE_TAG
36#define CONFIG_SETUP_MEMORY_TAGS
37#define CONFIG_INITRD_TAG
38#define CONFIG_REVISION_TAG
39
Peter Robinson490a61e2015-05-22 17:30:49 +0100[diff] [blame]40/* Boot options */
Fabio Estevam1b691df2018-01-03 12:33:05 -0200[diff] [blame]41#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
42 defined(CONFIG_MX6SX) || \
43 defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
Fabio Estevam8c717e52015-05-28 12:33:34 -0300[diff] [blame]44#define CONFIG_LOADADDR 0x82000000
Fabio Estevam8c717e52015-05-28 12:33:34 -0300[diff] [blame]45#else
Peter Robinson490a61e2015-05-22 17:30:49 +0100[diff] [blame]46#define CONFIG_LOADADDR 0x12000000
Fabio Estevam8c717e52015-05-28 12:33:34 -0300[diff] [blame]47#endif
48#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
49
Peter Robinson61a1b9d2015-05-22 17:30:50 +0100[diff] [blame]50/* allow to overwrite serial and ethaddr */
51#define CONFIG_ENV_OVERWRITE
Peter Robinson61a1b9d2015-05-22 17:30:50 +0100[diff] [blame]52
53/* Miscellaneous configurable options */
Peter Robinson61a1b9d2015-05-22 17:30:50 +0100[diff] [blame]54#define CONFIG_SYS_CBSIZE 512
55#define CONFIG_SYS_MAXARGS 32
Peter Robinson61a1b9d2015-05-22 17:30:50 +0100[diff] [blame]56
Peter Robinsonbe6c5f12015-05-22 17:30:52 +0100[diff] [blame]57/* MMC */
Peter Robinsonbe6c5f12015-05-22 17:30:52 +0100[diff] [blame]58#define CONFIG_FSL_USDHC
59
Gary Bisson70466e42016-08-25 19:03:18 +0200[diff] [blame]60/* Secure boot (HAB) support */
61#ifdef CONFIG_SECURE_BOOT
Breno Matheus Limac2d47442019-04-26 02:56:48 +0000[diff] [blame]62#define CONFIG_CSF_SIZE 0x4000
Sven Ebenfeldeba5e332016-11-06 16:37:55 +0100[diff] [blame]63#ifdef CONFIG_SPL_BUILD
64#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
65#endif
Gary Bisson70466e42016-08-25 19:03:18 +0200[diff] [blame]66#endif
67
Stephen Warren57ab23f2013-02-26 12:28:29 +0000[diff] [blame]68#endif