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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andreas Färber9e3ad682017-05-15 17:51:18 +08002/*
3 * Copyright (C) 2017 Rockchip Electronics Co., Ltd
4 * Author: Andy Yan <andy.yan@rock-chips.org>
Andreas Färber9e3ad682017-05-15 17:51:18 +08005 */
6
Andreas Färber9e3ad682017-05-15 17:51:18 +08007#include <dm.h>
8#include <syscon.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +08009#include <asm/arch-rockchip/clock.h>
10#include <asm/arch-rockchip/cru_rk3368.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070011#include <linux/err.h>
Andreas Färber9e3ad682017-05-15 17:51:18 +080012
13int rockchip_get_clk(struct udevice **devp)
14{
15 return uclass_get_device_by_driver(UCLASS_CLK,
Simon Glass65130cd2020-12-28 20:34:56 -070016 DM_DRIVER_GET(rockchip_rk3368_cru), devp);
Andreas Färber9e3ad682017-05-15 17:51:18 +080017}
18
19void *rockchip_get_cru(void)
20{
21 struct rk3368_clk_priv *priv;
22 struct udevice *dev;
23 int ret;
24
25 ret = rockchip_get_clk(&dev);
26 if (ret)
27 return ERR_PTR(ret);
28
29 priv = dev_get_priv(dev);
30
31 return priv->cru;
32}