blob: 32e9694b77cebbedd79ae204252eb9627591e2d8 [file] [log] [blame]
Michael Walle36ba7642020-10-15 23:08:57 +02001// SPDX-License-Identifier: GPL-2.0+
2
3#include <common.h>
Michael Walle3b185bc2021-11-15 23:45:46 +01004#include <dm.h>
Michael Walle36ba7642020-10-15 23:08:57 +02005#include <malloc.h>
Sughosh Ganuccb36462022-04-15 11:29:34 +05306#include <efi.h>
7#include <efi_loader.h>
Michael Walle36ba7642020-10-15 23:08:57 +02008#include <errno.h>
9#include <fsl_ddr.h>
10#include <fdt_support.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060011#include <asm/global_data.h>
Michael Walle36ba7642020-10-15 23:08:57 +020012#include <linux/libfdt.h>
Sughosh Ganuccb36462022-04-15 11:29:34 +053013#include <linux/kernel.h>
Michael Walle36ba7642020-10-15 23:08:57 +020014#include <env_internal.h>
15#include <asm/arch-fsl-layerscape/soc.h>
16#include <asm/arch-fsl-layerscape/fsl_icid.h>
17#include <i2c.h>
18#include <asm/arch/soc.h>
19#include <fsl_immap.h>
20#include <netdev.h>
Michael Walle324b7b42021-11-15 23:45:49 +010021#include <wdt.h>
Michael Walle36ba7642020-10-15 23:08:57 +020022
Michael Walle3b185bc2021-11-15 23:45:46 +010023#include <sl28cpld.h>
Michael Walle36ba7642020-10-15 23:08:57 +020024#include <fdtdec.h>
25#include <miiphy.h>
26
27DECLARE_GLOBAL_DATA_PTR;
28
Sughosh Ganuccb36462022-04-15 11:29:34 +053029#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
30struct efi_fw_image fw_images[] = {
31 {
32 .image_type_id = KONTRON_SL28_FIT_IMAGE_GUID,
33 .fw_name = u"KONTRON-SL28-FIT",
34 .image_index = 1,
35 },
36};
37
38struct efi_capsule_update_info update_info = {
39 .dfu_string = "sf 0:0=u-boot-bin raw 0x210000 0x1d0000;"
40 "u-boot-env raw 0x3e0000 0x20000",
41 .images = fw_images,
42};
43
44u8 num_image_type_guids = ARRAY_SIZE(fw_images);
45#endif /* EFI_HAVE_CAPSULE_SUPPORT */
46
Michael Walle101410e2021-01-08 00:08:59 +010047int board_early_init_f(void)
48{
49 fsl_lsch3_early_init_f();
50 return 0;
51}
52
Michael Walle36ba7642020-10-15 23:08:57 +020053int board_init(void)
54{
Michael Walle36ba7642020-10-15 23:08:57 +020055 return 0;
56}
57
58int board_eth_init(struct bd_info *bis)
59{
60 return pci_eth_init(bis);
61}
62
Michael Walle3b185bc2021-11-15 23:45:46 +010063static int __sl28cpld_read(uint reg)
64{
65 struct udevice *dev;
66 int ret;
67
68 ret = uclass_get_device_by_driver(UCLASS_NOP,
69 DM_DRIVER_GET(sl28cpld), &dev);
70 if (ret)
71 return ret;
72
73 return sl28cpld_read(dev, reg);
74}
75
76static void print_cpld_version(void)
77{
78 int version = __sl28cpld_read(SL28CPLD_VERSION);
79
80 if (version < 0)
81 printf("CPLD: error reading version (%d)\n", version);
82 else
83 printf("CPLD: v%d\n", version);
84}
85
Michael Walle36ba7642020-10-15 23:08:57 +020086int checkboard(void)
87{
88 printf("EL: %d\n", current_el());
Michael Walle3b185bc2021-11-15 23:45:46 +010089 if (CONFIG_IS_ENABLED(SL28CPLD))
90 print_cpld_version();
91
Michael Walle36ba7642020-10-15 23:08:57 +020092 return 0;
93}
94
Michael Walle324b7b42021-11-15 23:45:49 +010095static void stop_recovery_watchdog(void)
96{
97 struct udevice *dev;
98 int ret;
99
100 ret = uclass_get_device_by_driver(UCLASS_WDT,
101 DM_DRIVER_GET(sl28cpld_wdt), &dev);
102 if (!ret)
103 wdt_stop(dev);
104}
105
106int fsl_board_late_init(void)
107{
108 /*
109 * Usually, the after a board reset, the watchdog is enabled by
110 * default. This is to supervise the bootloader boot-up. Therefore,
111 * to prevent a watchdog reset if we don't actively kick it, we have
112 * to disable it.
113 *
114 * If the watchdog isn't enabled at reset (which is a configuration
115 * option) disabling it doesn't hurt either.
116 */
117 if (!CONFIG_IS_ENABLED(WATCHDOG_AUTOSTART))
118 stop_recovery_watchdog();
119
120 return 0;
121}
122
Michael Walle36ba7642020-10-15 23:08:57 +0200123void detail_board_ddr_info(void)
124{
Michael Walle36ba7642020-10-15 23:08:57 +0200125 print_ddr_info(0);
126}
127
128int ft_board_setup(void *blob, struct bd_info *bd)
129{
130 u64 base[CONFIG_NR_DRAM_BANKS];
131 u64 size[CONFIG_NR_DRAM_BANKS];
132 int nbanks = CONFIG_NR_DRAM_BANKS;
Michael Walle76427fb2020-11-18 17:46:02 +0100133 int node;
Michael Walle36ba7642020-10-15 23:08:57 +0200134 int i;
135
136 ft_cpu_setup(blob, bd);
137
138 /* fixup DT for the two GPP DDR banks */
139 for (i = 0; i < nbanks; i++) {
140 base[i] = gd->bd->bi_dram[i].start;
141 size[i] = gd->bd->bi_dram[i].size;
142 }
143
144 fdt_fixup_memory_banks(blob, base, size, nbanks);
145
146 fdt_fixup_icid(blob);
147
Michael Walle76427fb2020-11-18 17:46:02 +0100148 if (CONFIG_IS_ENABLED(SL28_SPL_LOADS_OPTEE_BL32)) {
149 node = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz");
150 if (node)
Marek BehĂșnf872e832021-11-26 14:57:08 +0100151 fdt_set_node_status(blob, node, FDT_STATUS_OKAY);
Michael Walle76427fb2020-11-18 17:46:02 +0100152 }
153
Michael Walle36ba7642020-10-15 23:08:57 +0200154 return 0;
155}