blob: fb806b53d4410d492cad3ac21745e4194f51c9e2 [file] [log] [blame]
Jason Jina63ce952007-07-06 08:34:56 +08001/****************************************************************************
2*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +02003* Video BOOT Graphics Card POST Module
Jason Jina63ce952007-07-06 08:34:56 +08004*
5* ========================================================================
Kumar Gala6a6d9482009-07-28 21:49:52 -05006* Copyright (C) 2007 Freescale Semiconductor, Inc.
Jason Jina63ce952007-07-06 08:34:56 +08007* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
10*
11* This file may be distributed and/or modified under the terms of the
12* GNU General Public License version 2.0 as published by the Free
13* Software Foundation and appearing in the file LICENSE.GPL included
14* in the packaging of this file.
15*
16* Licensees holding a valid Commercial License for this product from
17* SciTech Software, Inc. may use this file in accordance with the
18* Commercial License Agreement provided with the Software.
19*
20* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
21* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22* PURPOSE.
23*
24* See http://www.scitechsoft.com/license/ for information about
25* the licensing options available and how to purchase a Commercial
26* License Agreement.
27*
28* Contact license@scitechsoft.com if any conditions of this licensing
29* are not clear to you, or you have questions about licensing options.
30*
31* ========================================================================
32*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020033* Language: ANSI C
34* Environment: Linux Kernel
35* Developer: Kendall Bennett
Jason Jina63ce952007-07-06 08:34:56 +080036*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020037* Description: Module to implement booting PCI/AGP controllers on the
38* bus. We use the x86 real mode emulator to run the BIOS on
39* graphics controllers to bring the cards up.
Jason Jina63ce952007-07-06 08:34:56 +080040*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020041* Note that at present this module does *not* support
42* multiple controllers.
Jason Jina63ce952007-07-06 08:34:56 +080043*
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020044* The orignal name of this file is warmboot.c.
45* Jason ported this file to u-boot to run the ATI video card
46* BIOS in u-boot.
Jason Jina63ce952007-07-06 08:34:56 +080047****************************************************************************/
48#include <common.h>
Simon Glassacda1cc2014-11-14 20:56:40 -070049#include <bios_emul.h>
50#include <errno.h>
Jason Jina63ce952007-07-06 08:34:56 +080051#include <malloc.h>
Simon Glassacda1cc2014-11-14 20:56:40 -070052#include <vbe.h>
53#include "biosemui.h"
Jason Jina63ce952007-07-06 08:34:56 +080054
55/* Length of the BIOS image */
Wolfgang Denk96bb2e02007-08-06 02:17:36 +020056#define MAX_BIOSLEN (128 * 1024L)
Jason Jina63ce952007-07-06 08:34:56 +080057
Jason Jina63ce952007-07-06 08:34:56 +080058/* Place to save PCI BAR's that we change and later restore */
59static u32 saveROMBaseAddress;
60static u32 saveBaseAddress10;
61static u32 saveBaseAddress14;
62static u32 saveBaseAddress18;
63static u32 saveBaseAddress20;
64
Simon Glassc55b1c62014-12-29 19:32:26 -070065/* Addres im memory of VBE region */
66const int vbe_offset = 0x2000;
67
Bin Mengc9dba412018-04-11 22:02:15 -070068#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glassc55b1c62014-12-29 19:32:26 -070069static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info,
70 u32 x86_dword_ptr)
71{
72 u32 seg_ofs, flat;
73
74 seg_ofs = le32_to_cpu(x86_dword_ptr);
75 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff);
76 if (flat >= 0xc0000)
77 return vga_info->BIOSImage + flat - 0xc0000;
78 else
79 return buf + (flat - vbe_offset);
80}
81
82static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs,
83 int vesa_mode, struct vbe_mode_info *mode_info)
Simon Glassacda1cc2014-11-14 20:56:40 -070084{
Simon Glassc55b1c62014-12-29 19:32:26 -070085 void *buffer = (void *)(M.mem_base + vbe_offset);
86 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
87 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
88 struct vesa_mode_info *vm;
89 struct vbe_info *info;
90 const u16 *modes_bios, *ptr;
91 u16 *modes;
92 int size;
93
94 debug("VBE: Getting information\n");
95 regs->e.eax = VESA_GET_INFO;
96 regs->e.esi = buffer_seg;
97 regs->e.edi = buffer_adr;
98 info = buffer;
99 memset(info, '\0', sizeof(*info));
100 strcpy(info->signature, "VBE2");
101 BE_int86(0x10, regs, regs);
102 if (regs->e.eax != 0x4f) {
103 debug("VESA_GET_INFO: error %x\n", regs->e.eax);
104 return -ENOSYS;
105 }
106 debug("version %x\n", le16_to_cpu(info->version));
107 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info,
108 info->oem_string_ptr));
109 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info,
110 info->vendor_name_ptr));
111 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info,
112 info->product_name_ptr));
113 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info,
114 info->product_rev_ptr));
115 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr);
116 debug("Modes: ");
117 for (ptr = modes_bios; *ptr != 0xffff; ptr++)
118 debug("%x ", le16_to_cpu(*ptr));
119 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4);
120 size = (ptr - modes_bios) * sizeof(u16) + 2;
121 modes = malloc(size);
122 if (!modes)
123 return -ENOMEM;
124 memcpy(modes, modes_bios, size);
125
126 regs->e.eax = VESA_GET_CUR_MODE;
127 BE_int86(0x10, regs, regs);
128 if (regs->e.eax != 0x4f) {
129 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax);
130 return -ENOSYS;
131 }
132 debug("Current mode %x\n", regs->e.ebx);
133
134 for (ptr = modes; *ptr != 0xffff; ptr++) {
135 int mode = le16_to_cpu(*ptr);
136 bool linear_ok;
137 int attr;
138
Simon Glassc55b1c62014-12-29 19:32:26 -0700139 debug("Mode %x: ", mode);
140 memset(buffer, '\0', sizeof(struct vbe_mode_info));
141 regs->e.eax = VESA_GET_MODE_INFO;
142 regs->e.ebx = 0;
143 regs->e.ecx = mode;
144 regs->e.edx = 0;
145 regs->e.esi = buffer_seg;
146 regs->e.edi = buffer_adr;
147 BE_int86(0x10, regs, regs);
148 if (regs->e.eax != 0x4f) {
149 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
150 continue;
151 }
152 memcpy(mode_info->mode_info_block, buffer,
153 sizeof(struct vesa_mode_info));
154 mode_info->valid = true;
155 vm = &mode_info->vesa;
156 attr = le16_to_cpu(vm->mode_attributes);
157 linear_ok = attr & 0x80;
158 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n",
159 le16_to_cpu(vm->x_resolution),
160 le16_to_cpu(vm->y_resolution),
161 vm->bits_per_pixel, vm->memory_model,
162 linear_ok ? "OK" : "not available",
163 attr);
164 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n",
165 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos,
166 vm->red_mask_size, vm->green_mask_size,
167 vm->blue_mask_size);
168 }
169
170 return 0;
171}
172
173static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
174 struct vbe_mode_info *mode_info)
175{
176 void *buffer = (void *)(M.mem_base + vbe_offset);
177 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00;
178 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff;
179 struct vesa_mode_info *vm;
180
Simon Glassacda1cc2014-11-14 20:56:40 -0700181 debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
Simon Glassacda1cc2014-11-14 20:56:40 -0700182 regs->e.eax = VESA_SET_MODE;
183 regs->e.ebx = vesa_mode;
Simon Glassc55b1c62014-12-29 19:32:26 -0700184 /* request linear framebuffer mode and don't clear display */
185 regs->e.ebx |= (1 << 14) | (1 << 15);
Simon Glassacda1cc2014-11-14 20:56:40 -0700186 BE_int86(0x10, regs, regs);
Simon Glassc55b1c62014-12-29 19:32:26 -0700187 if (regs->e.eax != 0x4f) {
188 debug("VESA_SET_MODE: error %x\n", regs->e.eax);
189 return -ENOSYS;
190 }
Simon Glassacda1cc2014-11-14 20:56:40 -0700191
Simon Glassc55b1c62014-12-29 19:32:26 -0700192 memset(buffer, '\0', sizeof(struct vbe_mode_info));
193 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode);
Simon Glassacda1cc2014-11-14 20:56:40 -0700194 regs->e.eax = VESA_GET_MODE_INFO;
Simon Glassacda1cc2014-11-14 20:56:40 -0700195 regs->e.ecx = vesa_mode;
Simon Glassacda1cc2014-11-14 20:56:40 -0700196 regs->e.esi = buffer_seg;
197 regs->e.edi = buffer_adr;
198 BE_int86(0x10, regs, regs);
Simon Glassc55b1c62014-12-29 19:32:26 -0700199 if (regs->e.eax != 0x4f) {
200 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax);
201 return -ENOSYS;
202 }
203
Simon Glassacda1cc2014-11-14 20:56:40 -0700204 memcpy(mode_info->mode_info_block, buffer,
Simon Glassc55b1c62014-12-29 19:32:26 -0700205 sizeof(struct vesa_mode_info));
Simon Glassacda1cc2014-11-14 20:56:40 -0700206 mode_info->valid = true;
Simon Glassc55b1c62014-12-29 19:32:26 -0700207 mode_info->video_mode = vesa_mode;
208 vm = &mode_info->vesa;
209 vm->x_resolution = le16_to_cpu(vm->x_resolution);
210 vm->y_resolution = le16_to_cpu(vm->y_resolution);
211 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline);
212 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr);
213 vm->mode_attributes = le16_to_cpu(vm->mode_attributes);
214 debug("VBE: Init complete\n");
Simon Glassacda1cc2014-11-14 20:56:40 -0700215
Simon Glassc55b1c62014-12-29 19:32:26 -0700216 return 0;
Simon Glassacda1cc2014-11-14 20:56:40 -0700217}
Bin Mengc9dba412018-04-11 22:02:15 -0700218#endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */
Simon Glassacda1cc2014-11-14 20:56:40 -0700219
Jason Jina63ce952007-07-06 08:34:56 +0800220/****************************************************************************
221PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200222pcidev - PCI device info for the video card on the bus to boot
Simon Glassacda1cc2014-11-14 20:56:40 -0700223vga_info - BIOS emulator VGA info structure
Jason Jina63ce952007-07-06 08:34:56 +0800224
225REMARKS:
226This function executes the BIOS POST code on the controller. We assume that
227at this stage the controller has its I/O and memory space enabled and
228that all other controllers are in a disabled state.
229****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700230#ifdef CONFIG_DM_PCI
231static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info,
232 int vesa_mode, struct vbe_mode_info *mode_info)
233#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700234static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
235 int vesa_mode, struct vbe_mode_info *mode_info)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700236#endif
Jason Jina63ce952007-07-06 08:34:56 +0800237{
238 RMREGS regs;
239 RMSREGS sregs;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700240#ifdef CONFIG_DM_PCI
241 pci_dev_t bdf;
242#endif
Jason Jina63ce952007-07-06 08:34:56 +0800243
244 /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
245 AH must contain the bus and AL must contain the devfn, encoded as
246 (dev << 3) | fn
247 */
248 memset(&regs, 0, sizeof(regs));
249 memset(&sregs, 0, sizeof(sregs));
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700250#ifdef CONFIG_DM_PCI
251 bdf = dm_pci_get_bdf(pcidev);
252 regs.x.ax = (int)PCI_BUS(bdf) << 8 |
253 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf);
254#else
Jason Jina63ce952007-07-06 08:34:56 +0800255 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
256 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700257#endif
Jason Jina63ce952007-07-06 08:34:56 +0800258 /*Setup the X86 emulator for the VGA BIOS*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700259 BE_setVGA(vga_info);
Jason Jina63ce952007-07-06 08:34:56 +0800260
261 /*Execute the BIOS POST code*/
262 BE_callRealMode(0xC000, 0x0003, &regs, &sregs);
263
264 /*Cleanup and exit*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700265 BE_getVGA(vga_info);
266
Bin Mengc9dba412018-04-11 22:02:15 -0700267#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
Simon Glassc55b1c62014-12-29 19:32:26 -0700268 /* Useful for debugging */
269 if (0)
270 atibios_debug_mode(vga_info, &regs, vesa_mode, mode_info);
Simon Glassacda1cc2014-11-14 20:56:40 -0700271 if (vesa_mode != -1)
272 atibios_set_vesa_mode(&regs, vesa_mode, mode_info);
Bin Mengc9dba412018-04-11 22:02:15 -0700273#endif
Jason Jina63ce952007-07-06 08:34:56 +0800274}
275
276/****************************************************************************
277PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200278pcidev - PCI device info for the video card on the bus
279bar - Place to return the base address register offset to use
Jason Jina63ce952007-07-06 08:34:56 +0800280
281RETURNS:
282The address to use to map the secondary BIOS (AGP devices)
283
284REMARKS:
285Searches all the PCI base address registers for the device looking for a
286memory mapping that is large enough to hold our ROM BIOS. We usually end up
287finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
288to map the BIOS for the device into. We use a mapping that is already
289assigned to the device to ensure the memory range will be passed through
290by any PCI->PCI or AGP->PCI bridge that may be present.
291
292NOTE: Usually this function is only used for AGP devices, but it may be
293 used for PCI devices that have already been POST'ed and the BIOS
294 ROM base address has been zero'ed out.
295
296NOTE: This function leaves the original memory aperture disabled by leaving
297 it programmed to all 1's. It must be restored to the correct value
298 later.
299****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700300#ifdef CONFIG_DM_PCI
301static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar)
302#else
Jason Jina63ce952007-07-06 08:34:56 +0800303static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700304#endif
Jason Jina63ce952007-07-06 08:34:56 +0800305{
306 u32 base, size;
307
308 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700309#ifdef CONFIG_DM_PCI
310 dm_pci_read_config32(pcidev, *bar, &base);
311#else
Jason Jina63ce952007-07-06 08:34:56 +0800312 pci_read_config_dword(pcidev, *bar, &base);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700313#endif
Jason Jina63ce952007-07-06 08:34:56 +0800314 if (!(base & 0x1)) {
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700315#ifdef CONFIG_DM_PCI
316 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF);
317 dm_pci_read_config32(pcidev, *bar, &size);
318#else
Jason Jina63ce952007-07-06 08:34:56 +0800319 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
320 pci_read_config_dword(pcidev, *bar, &size);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700321#endif
Jason Jina63ce952007-07-06 08:34:56 +0800322 size = ~(size & ~0xFF) + 1;
323 if (size >= MAX_BIOSLEN)
324 return base & ~0xFF;
325 }
326 }
327 return 0;
328}
329
330/****************************************************************************
331REMARKS:
332Some non-x86 Linux kernels map PCI relocateable I/O to values that
333are above 64K, which will not work with the BIOS image that requires
334the offset for the I/O ports to be a maximum of 16-bits. Ideally
335someone should fix the kernel to map the I/O ports for VGA compatible
336devices to a different location (or just all I/O ports since it is
337unlikely you can have enough devices in the machine to use up all
33864K of the I/O space - a total of more than 256 cards would be
339necessary).
340
341Anyway to fix this we change all I/O mapped base registers and
342chop off the top bits.
343****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700344#ifdef CONFIG_DM_PCI
345static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base)
346#else
Jason Jina63ce952007-07-06 08:34:56 +0800347static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700348#endif
Jason Jina63ce952007-07-06 08:34:56 +0800349{
350 if ((*base & 0x1) && (*base > 0xFFFE)) {
351 *base &= 0xFFFF;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700352#ifdef CONFIG_DM_PCI
353 dm_pci_write_config32(pcidev, reg, *base);
354#else
Jason Jina63ce952007-07-06 08:34:56 +0800355 pci_write_config_dword(pcidev, reg, *base);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700356#endif
Jason Jina63ce952007-07-06 08:34:56 +0800357
358 }
359}
360
361/****************************************************************************
362PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200363pcidev - PCI device info for the video card on the bus
Jason Jina63ce952007-07-06 08:34:56 +0800364
365RETURNS:
366Pointers to the mapped BIOS image
367
368REMARKS:
369Maps a pointer to the BIOS image on the graphics card on the PCI bus.
370****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700371#ifdef CONFIG_DM_PCI
372void *PCI_mapBIOSImage(struct udevice *pcidev)
373#else
Jason Jina63ce952007-07-06 08:34:56 +0800374void *PCI_mapBIOSImage(pci_dev_t pcidev)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700375#endif
Jason Jina63ce952007-07-06 08:34:56 +0800376{
Ed Swarthout224dad22010-03-31 15:52:40 -0500377 u32 BIOSImageBus;
Jason Jina63ce952007-07-06 08:34:56 +0800378 int BIOSImageBAR;
379 u8 *BIOSImage;
380
381 /*Save PCI BAR registers that might get changed*/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700382#ifdef CONFIG_DM_PCI
383 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
384 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
385 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
386 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
387 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
388#else
Jason Jina63ce952007-07-06 08:34:56 +0800389 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
390 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
391 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
392 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
393 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700394#endif
Jason Jina63ce952007-07-06 08:34:56 +0800395
396 /*Fix up I/O base registers to less than 64K */
397 if(saveBaseAddress14 != 0)
398 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
399 else
400 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
401
402 /* Some cards have problems that stop us from being able to read the
403 BIOS image from the ROM BAR. To fix this we have to do some chipset
404 specific programming for different cards to solve this problem.
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200405 */
Jason Jina63ce952007-07-06 08:34:56 +0800406
Ed Swarthout224dad22010-03-31 15:52:40 -0500407 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
408 if (BIOSImageBus == 0) {
Jason Jina63ce952007-07-06 08:34:56 +0800409 printf("Find bios addr error\n");
410 return NULL;
411 }
412
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700413#ifdef CONFIG_DM_PCI
414 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus,
415 PCI_REGION_MEM, 0, MAP_NOCACHE);
416
417 /*Change the PCI BAR registers to map it onto the bus.*/
418 dm_pci_write_config32(pcidev, BIOSImageBAR, 0);
419 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
420#else
Ed Swarthout224dad22010-03-31 15:52:40 -0500421 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
422 PCI_REGION_MEM, 0, MAP_NOCACHE);
Jason Jina63ce952007-07-06 08:34:56 +0800423
424 /*Change the PCI BAR registers to map it onto the bus.*/
425 pci_write_config_dword(pcidev, BIOSImageBAR, 0);
Ed Swarthout224dad22010-03-31 15:52:40 -0500426 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700427#endif
Jason Jina63ce952007-07-06 08:34:56 +0800428 udelay(1);
429
430 /*Check that the BIOS image is valid. If not fail, or return the
431 compiled in BIOS image if that option was enabled
432 */
433 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
434 return NULL;
435 }
436
437 return BIOSImage;
438}
439
440/****************************************************************************
441PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200442pcidev - PCI device info for the video card on the bus
Jason Jina63ce952007-07-06 08:34:56 +0800443
444REMARKS:
445Unmaps the BIOS image for the device and restores framebuffer mappings
446****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700447#ifdef CONFIG_DM_PCI
448void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage)
449{
450 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
451 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
452 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
453 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
454 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
455}
456#else
Jason Jina63ce952007-07-06 08:34:56 +0800457void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
458{
459 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
460 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
461 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
462 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
463 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
464}
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700465#endif
Jason Jina63ce952007-07-06 08:34:56 +0800466
467/****************************************************************************
468PARAMETERS:
Wolfgang Denk96bb2e02007-08-06 02:17:36 +0200469pcidev - PCI device info for the video card on the bus to boot
Jason Jina63ce952007-07-06 08:34:56 +0800470VGAInfo - BIOS emulator VGA info structure
471
472RETURNS:
York Sun4a598092013-04-01 11:29:11 -0700473true if successfully initialised, false if not.
Jason Jina63ce952007-07-06 08:34:56 +0800474
475REMARKS:
476Loads and POST's the display controllers BIOS, directly from the BIOS
477image we can extract over the PCI bus.
478****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700479#ifdef CONFIG_DM_PCI
480static int PCI_postController(struct udevice *pcidev, uchar *bios_rom,
481 int bios_len, BE_VGAInfo *vga_info,
482 int vesa_mode, struct vbe_mode_info *mode_info)
483#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700484static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
485 BE_VGAInfo *vga_info, int vesa_mode,
486 struct vbe_mode_info *mode_info)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700487#endif
Jason Jina63ce952007-07-06 08:34:56 +0800488{
Simon Glassacda1cc2014-11-14 20:56:40 -0700489 u32 bios_image_len;
490 uchar *mapped_bios;
491 uchar *copy_of_bios;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700492#ifdef CONFIG_DM_PCI
493 pci_dev_t bdf;
494#endif
Jason Jina63ce952007-07-06 08:34:56 +0800495
Simon Glassacda1cc2014-11-14 20:56:40 -0700496 if (bios_rom) {
497 copy_of_bios = bios_rom;
498 bios_image_len = bios_len;
499 } else {
500 /*
501 * Allocate memory to store copy of BIOS from display
502 * controller
503 */
504 mapped_bios = PCI_mapBIOSImage(pcidev);
505 if (mapped_bios == NULL) {
506 printf("videoboot: Video ROM failed to map!\n");
507 return false;
508 }
Jason Jina63ce952007-07-06 08:34:56 +0800509
Simon Glassacda1cc2014-11-14 20:56:40 -0700510 bios_image_len = mapped_bios[2] * 512;
Jason Jina63ce952007-07-06 08:34:56 +0800511
Simon Glassacda1cc2014-11-14 20:56:40 -0700512 copy_of_bios = malloc(bios_image_len);
513 if (copy_of_bios == NULL) {
514 printf("videoboot: Out of memory!\n");
515 return false;
516 }
517 memcpy(copy_of_bios, mapped_bios, bios_image_len);
518 PCI_unmapBIOSImage(pcidev, mapped_bios);
Jason Jina63ce952007-07-06 08:34:56 +0800519 }
Jason Jina63ce952007-07-06 08:34:56 +0800520
Simon Glassacda1cc2014-11-14 20:56:40 -0700521 /*Save information in vga_info structure*/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700522#ifdef CONFIG_DM_PCI
523 bdf = dm_pci_get_bdf(pcidev);
524 vga_info->function = PCI_FUNC(bdf);
525 vga_info->device = PCI_DEV(bdf);
526 vga_info->bus = PCI_BUS(bdf);
527#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700528 vga_info->function = PCI_FUNC(pcidev);
529 vga_info->device = PCI_DEV(pcidev);
530 vga_info->bus = PCI_BUS(pcidev);
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700531#endif
Simon Glassacda1cc2014-11-14 20:56:40 -0700532 vga_info->pcidev = pcidev;
533 vga_info->BIOSImage = copy_of_bios;
534 vga_info->BIOSImageLen = bios_image_len;
Jason Jina63ce952007-07-06 08:34:56 +0800535
536 /*Now execute the BIOS POST for the device*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700537 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
Jason Jina63ce952007-07-06 08:34:56 +0800538 printf("videoboot: Video ROM image is invalid!\n");
539 return false;
540 }
541
Simon Glassacda1cc2014-11-14 20:56:40 -0700542 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
Jason Jina63ce952007-07-06 08:34:56 +0800543
544 /*Reset the size of the BIOS image to the final size*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700545 vga_info->BIOSImageLen = copy_of_bios[2] * 512;
Jason Jina63ce952007-07-06 08:34:56 +0800546 return true;
547}
548
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700549#ifdef CONFIG_DM_PCI
550int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop)
551#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700552int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700553#endif
Jason Jina63ce952007-07-06 08:34:56 +0800554{
555 BE_VGAInfo *VGAInfo;
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700556#ifdef CONFIG_DM_PCI
557 pci_dev_t bdf = dm_pci_get_bdf(pcidev);
Jason Jina63ce952007-07-06 08:34:56 +0800558
559 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700560 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf));
561#else
562 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
563 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
564#endif
Jason Jina63ce952007-07-06 08:34:56 +0800565 /*Initialise the x86 BIOS emulator*/
566 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
567 printf("videoboot: Out of memory!\n");
Simon Glassacda1cc2014-11-14 20:56:40 -0700568 return -ENOMEM;
Jason Jina63ce952007-07-06 08:34:56 +0800569 }
570 memset(VGAInfo, 0, sizeof(*VGAInfo));
571 BE_init(0, 65536, VGAInfo, 0);
Simon Glassacda1cc2014-11-14 20:56:40 -0700572 *vga_infop = VGAInfo;
Jason Jina63ce952007-07-06 08:34:56 +0800573
Simon Glassacda1cc2014-11-14 20:56:40 -0700574 return 0;
575}
576
577void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
578{
579 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
580}
581
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700582#ifdef CONFIG_DM_PCI
583int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len,
584 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
585 struct vbe_mode_info *mode_info)
586#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700587int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
588 BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
589 struct vbe_mode_info *mode_info)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700590#endif
Simon Glassacda1cc2014-11-14 20:56:40 -0700591{
Jason Jina63ce952007-07-06 08:34:56 +0800592 /*Post all the display controller BIOS'es*/
Simon Glassacda1cc2014-11-14 20:56:40 -0700593 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
594 vesa_mode, mode_info))
595 return -EINVAL;
Jason Jina63ce952007-07-06 08:34:56 +0800596
Simon Glassacda1cc2014-11-14 20:56:40 -0700597 /*
598 * Cleanup and exit the emulator if requested. If the BIOS emulator
599 * is needed after booting the card, we will not call BE_exit and
600 * leave it enabled for further use (ie: VESA driver etc).
Jason Jina63ce952007-07-06 08:34:56 +0800601 */
Simon Glassacda1cc2014-11-14 20:56:40 -0700602 if (clean_up) {
Jason Jina63ce952007-07-06 08:34:56 +0800603 BE_exit();
Bin Menga264c902015-04-24 15:48:05 +0800604 if (vga_info->BIOSImage &&
Simon Glasscc409062016-09-25 21:33:06 -0600605 (ulong)(vga_info->BIOSImage) != 0xc0000)
Simon Glassacda1cc2014-11-14 20:56:40 -0700606 free(vga_info->BIOSImage);
607 free(vga_info);
Jason Jina63ce952007-07-06 08:34:56 +0800608 }
Simon Glassacda1cc2014-11-14 20:56:40 -0700609
610 return 0;
611}
612
613/****************************************************************************
614PARAMETERS:
615pcidev - PCI device info for the video card on the bus to boot
616pVGAInfo - Place to return VGA info structure is requested
617cleanUp - true to clean up on exit, false to leave emulator active
618
619REMARKS:
620Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
621and the X86 BIOS emulator module.
622****************************************************************************/
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700623#ifdef CONFIG_DM_PCI
624int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo,
625 int clean_up)
626#else
Simon Glassacda1cc2014-11-14 20:56:40 -0700627int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
Simon Glassd3e0c8f2016-01-17 16:11:09 -0700628#endif
Simon Glassacda1cc2014-11-14 20:56:40 -0700629{
630 BE_VGAInfo *VGAInfo;
631 int ret;
632
633 ret = biosemu_setup(pcidev, &VGAInfo);
634 if (ret)
635 return false;
636 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
637 if (ret)
638 return false;
639
640 /* Return VGA info pointer if the caller requested it*/
Jason Jina63ce952007-07-06 08:34:56 +0800641 if (pVGAInfo)
642 *pVGAInfo = VGAInfo;
Simon Glassacda1cc2014-11-14 20:56:40 -0700643
Jason Jina63ce952007-07-06 08:34:56 +0800644 return true;
645}