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Simon Schwarz4f62e982011-09-14 15:30:16 -04001/*
2 * (C) Copyright 2006-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Simon Schwarz4f62e982011-09-14 15:30:16 -04006 */
7
8#include <common.h>
9#include <nand.h>
10#include <asm/io.h>
Ilya Yanok4e699622011-11-28 06:37:37 +000011#include <linux/mtd/nand_ecc.h>
Simon Schwarz4f62e982011-09-14 15:30:16 -040012
13static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
Scott Wood2c1b7e12016-05-30 13:57:55 -050014static struct mtd_info *mtd;
Simon Schwarz4f62e982011-09-14 15:30:16 -040015static struct nand_chip nand_chip;
16
Stefano Babic533607c2011-12-15 10:55:37 +010017#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
18 CONFIG_SYS_NAND_ECCSIZE)
19#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
20
21
Simon Schwarz4f62e982011-09-14 15:30:16 -040022#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
23/*
24 * NAND command for small page NAND devices (512)
25 */
26static int nand_command(int block, int page, uint32_t offs,
27 u8 cmd)
28{
Scott Wood17fed142016-05-30 13:57:56 -050029 struct nand_chip *this = mtd_to_nand(mtd);
Simon Schwarz4f62e982011-09-14 15:30:16 -040030 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
31
Scott Wood2c1b7e12016-05-30 13:57:55 -050032 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040033 ;
34
35 /* Begin command latch cycle */
Scott Wood2c1b7e12016-05-30 13:57:55 -050036 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -040037 /* Set ALE and clear CLE to start address cycle */
38 /* Column address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050039 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
40 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
41 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
Simon Schwarz4f62e982011-09-14 15:30:16 -040042 NAND_CTRL_ALE); /* A[24:17] */
43#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
44 /* One more address cycle for devices > 32MiB */
Scott Wood2c1b7e12016-05-30 13:57:55 -050045 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
Simon Schwarz4f62e982011-09-14 15:30:16 -040046 NAND_CTRL_ALE); /* A[28:25] */
47#endif
48 /* Latch in address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050049 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -040050
51 /*
52 * Wait a while for the data to be ready
53 */
Scott Wood2c1b7e12016-05-30 13:57:55 -050054 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040055 ;
56
57 return 0;
58}
59#else
60/*
61 * NAND command for large page NAND devices (2k)
62 */
63static int nand_command(int block, int page, uint32_t offs,
64 u8 cmd)
65{
Scott Wood17fed142016-05-30 13:57:56 -050066 struct nand_chip *this = mtd_to_nand(mtd);
Simon Schwarz4f62e982011-09-14 15:30:16 -040067 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
68 void (*hwctrl)(struct mtd_info *mtd, int cmd,
69 unsigned int ctrl) = this->cmd_ctrl;
70
Scott Wood2c1b7e12016-05-30 13:57:55 -050071 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040072 ;
73
74 /* Emulate NAND_CMD_READOOB */
75 if (cmd == NAND_CMD_READOOB) {
76 offs += CONFIG_SYS_NAND_PAGE_SIZE;
77 cmd = NAND_CMD_READ0;
78 }
79
80 /* Shift the offset from byte addressing to word addressing. */
Brian Norris67675222014-05-06 00:46:17 +053081 if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd))
Simon Schwarz4f62e982011-09-14 15:30:16 -040082 offs >>= 1;
83
84 /* Begin command latch cycle */
Scott Wood2c1b7e12016-05-30 13:57:55 -050085 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -040086 /* Set ALE and clear CLE to start address cycle */
87 /* Column address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050088 hwctrl(mtd, offs & 0xff,
89 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
90 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
Simon Schwarz4f62e982011-09-14 15:30:16 -040091 /* Row address */
Scott Wood2c1b7e12016-05-30 13:57:55 -050092 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
93 hwctrl(mtd, ((page_addr >> 8) & 0xff),
94 NAND_CTRL_ALE); /* A[27:20] */
Simon Schwarz4f62e982011-09-14 15:30:16 -040095#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
96 /* One more address cycle for devices > 128MiB */
Scott Wood2c1b7e12016-05-30 13:57:55 -050097 hwctrl(mtd, (page_addr >> 16) & 0x0f,
Simon Schwarz4f62e982011-09-14 15:30:16 -040098 NAND_CTRL_ALE); /* A[31:28] */
99#endif
100 /* Latch in address */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500101 hwctrl(mtd, NAND_CMD_READSTART,
102 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
103 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400104
105 /*
106 * Wait a while for the data to be ready
107 */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500108 while (!this->dev_ready(mtd))
Simon Schwarz4f62e982011-09-14 15:30:16 -0400109 ;
110
111 return 0;
112}
113#endif
114
115static int nand_is_bad_block(int block)
116{
Scott Wood17fed142016-05-30 13:57:56 -0500117 struct nand_chip *this = mtd_to_nand(mtd);
Vladimir Zapolskiycb8183d2015-07-18 01:47:08 +0300118 u_char bb_data[2];
Simon Schwarz4f62e982011-09-14 15:30:16 -0400119
120 nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
121 NAND_CMD_READOOB);
122
123 /*
124 * Read one byte (or two if it's a 16 bit chip).
125 */
126 if (this->options & NAND_BUSWIDTH_16) {
Scott Wood2c1b7e12016-05-30 13:57:55 -0500127 this->read_buf(mtd, bb_data, 2);
Vladimir Zapolskiycb8183d2015-07-18 01:47:08 +0300128 if (bb_data[0] != 0xff || bb_data[1] != 0xff)
Simon Schwarz4f62e982011-09-14 15:30:16 -0400129 return 1;
130 } else {
Scott Wood2c1b7e12016-05-30 13:57:55 -0500131 this->read_buf(mtd, bb_data, 1);
Vladimir Zapolskiycb8183d2015-07-18 01:47:08 +0300132 if (bb_data[0] != 0xff)
Simon Schwarz4f62e982011-09-14 15:30:16 -0400133 return 1;
134 }
135
136 return 0;
137}
138
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000139#if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
140static int nand_read_page(int block, int page, uchar *dst)
141{
Scott Wood17fed142016-05-30 13:57:56 -0500142 struct nand_chip *this = mtd_to_nand(mtd);
Stefano Babic533607c2011-12-15 10:55:37 +0100143 u_char ecc_calc[ECCTOTAL];
144 u_char ecc_code[ECCTOTAL];
145 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000146 int i;
147 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
148 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
Stefano Babic533607c2011-12-15 10:55:37 +0100149 int eccsteps = ECCSTEPS;
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000150 uint8_t *p = dst;
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000151
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000152 nand_command(block, page, 0, NAND_CMD_READOOB);
Scott Wood2c1b7e12016-05-30 13:57:55 -0500153 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000154 nand_command(block, page, 0, NAND_CMD_READ0);
155
156 /* Pick the ECC bytes out of the oob data */
Stefano Babic533607c2011-12-15 10:55:37 +0100157 for (i = 0; i < ECCTOTAL; i++)
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000158 ecc_code[i] = oob_data[nand_ecc_pos[i]];
159
160
161 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Scott Wood2c1b7e12016-05-30 13:57:55 -0500162 this->ecc.hwctl(mtd, NAND_ECC_READ);
163 this->read_buf(mtd, p, eccsize);
164 this->ecc.calculate(mtd, p, &ecc_calc[i]);
165 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000166 }
167
168 return 0;
169}
170#else
Simon Schwarz4f62e982011-09-14 15:30:16 -0400171static int nand_read_page(int block, int page, void *dst)
172{
Scott Wood17fed142016-05-30 13:57:56 -0500173 struct nand_chip *this = mtd_to_nand(mtd);
Stefano Babic533607c2011-12-15 10:55:37 +0100174 u_char ecc_calc[ECCTOTAL];
175 u_char ecc_code[ECCTOTAL];
176 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
Simon Schwarz4f62e982011-09-14 15:30:16 -0400177 int i;
178 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
179 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
Stefano Babic533607c2011-12-15 10:55:37 +0100180 int eccsteps = ECCSTEPS;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400181 uint8_t *p = dst;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400182
183 nand_command(block, page, 0, NAND_CMD_READ0);
184
Simon Schwarz4f62e982011-09-14 15:30:16 -0400185 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Ilya Yanok4e699622011-11-28 06:37:37 +0000186 if (this->ecc.mode != NAND_ECC_SOFT)
Scott Wood2c1b7e12016-05-30 13:57:55 -0500187 this->ecc.hwctl(mtd, NAND_ECC_READ);
188 this->read_buf(mtd, p, eccsize);
189 this->ecc.calculate(mtd, p, &ecc_calc[i]);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400190 }
Scott Wood2c1b7e12016-05-30 13:57:55 -0500191 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400192
193 /* Pick the ECC bytes out of the oob data */
Stefano Babic533607c2011-12-15 10:55:37 +0100194 for (i = 0; i < ECCTOTAL; i++)
Simon Schwarz4f62e982011-09-14 15:30:16 -0400195 ecc_code[i] = oob_data[nand_ecc_pos[i]];
196
Stefano Babic533607c2011-12-15 10:55:37 +0100197 eccsteps = ECCSTEPS;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400198 p = dst;
199
200 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
201 /* No chance to do something with the possible error message
202 * from correct_data(). We just hope that all possible errors
203 * are corrected by this routine.
204 */
Scott Wood2c1b7e12016-05-30 13:57:55 -0500205 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400206 }
207
208 return 0;
209}
Heiko Schocher44bd9b32011-11-01 20:00:30 +0000210#endif
Simon Schwarz4f62e982011-09-14 15:30:16 -0400211
Simon Schwarz4f62e982011-09-14 15:30:16 -0400212/* nand_init() - initialize data to make nand usable by SPL */
213void nand_init(void)
214{
215 /*
216 * Init board specific nand support
217 */
Boris Brezillon3b5f8842016-06-15 20:56:10 +0200218 mtd = nand_to_mtd(&nand_chip);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400219 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
220 (void __iomem *)CONFIG_SYS_NAND_BASE;
Simon Schwarz4f62e982011-09-14 15:30:16 -0400221 board_nand_init(&nand_chip);
222
Ilya Yanok4e699622011-11-28 06:37:37 +0000223#ifdef CONFIG_SPL_NAND_SOFTECC
224 if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
225 nand_chip.ecc.calculate = nand_calculate_ecc;
226 nand_chip.ecc.correct = nand_correct_data;
227 }
228#endif
229
Simon Schwarz4f62e982011-09-14 15:30:16 -0400230 if (nand_chip.select_chip)
Scott Wood2c1b7e12016-05-30 13:57:55 -0500231 nand_chip.select_chip(mtd, 0);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400232}
233
234/* Unselect after operation */
235void nand_deselect(void)
236{
237 if (nand_chip.select_chip)
Scott Wood2c1b7e12016-05-30 13:57:55 -0500238 nand_chip.select_chip(mtd, -1);
Simon Schwarz4f62e982011-09-14 15:30:16 -0400239}
Ladislav Michlc6a42002017-04-16 15:31:59 +0200240
241#include "nand_spl_loaders.c"