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git01.mediatek.com / filogic / uboot / 692f872e7a9f4d6168a18fa22cc72de88e6c3926 / . / arch / arm / dts / stm32mp15xx-dhcor-avenger96-u-boot.dtsi
blob: ab4d66c961954f97b70238972c8c2c3c43b8255a [file] [log] [blame]
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
4 */
5
6#include "stm32mp15xx-dhcor-u-boot.dtsi"
7
8/ {
9 aliases {
10 mmc0 = &sdmmc1;
11 mmc1 = &sdmmc2;
12 usb0 = &usbotg_hs;
13 };
14
15 config {
16 u-boot,boot-led = "led1";
17 u-boot,error-led = "led4";
Marek Vasut47b98ba2020-04-22 13:18:11 +0200[diff] [blame]18 dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]19 };
20};
21
Marek Vasutb0049492021-11-13 03:27:37 +0100[diff] [blame]22&ethernet0 {
Marek Vasut8b08dfb2021-12-30 23:46:46 +0100[diff] [blame]23 phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
24
Marek Vasutb0049492021-11-13 03:27:37 +0100[diff] [blame]25 mdio0 {
26 ethernet-phy@7 {
27 reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
28 reset-assert-us = <11000>;
29 reset-deassert-us = <1000>;
30 };
31 };
32};
33
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]34&sdmmc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]35 bootph-pre-ram;
Marek Vasut5f5ce602021-11-13 03:29:44 +0100[diff] [blame]36 st,use-ckin;
37 st,cmd-gpios = <&gpiod 2 0>;
38 st,ck-gpios = <&gpioc 12 0>;
39 st,ckin-gpios = <&gpioe 4 0>;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]40};
41
42&sdmmc1_b4_pins_a {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]43 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]44 pins1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]45 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]46 };
47 pins2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]48 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]49 };
50};
51
52&sdmmc1_dir_pins_b {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]53 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]54 pins1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]55 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]56 };
57 pins2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]59 };
60};
61
62&sdmmc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]63 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]64};
65
66&sdmmc2_b4_pins_a {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]67 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]68 pins1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]69 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]70 };
71 pins2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]72 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]73 };
74};
75
Marek Vasut29d247a2021-07-20 23:46:07 +0200[diff] [blame]76&sdmmc2_d47_pins_c {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]77 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]78 pins {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]79 bootph-pre-ram;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]80 };
81};
82
83&uart4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]84 bootph-all;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]85};
86
87&uart4_pins_b {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]88 bootph-all;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]89 pins1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]90 bootph-all;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]91 };
92 pins2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]93 bootph-all;
Marek Vasut8d9de5b2020-08-22 22:45:36 +0200[diff] [blame]94 /delete-property/ bias-disable;
95 bias-pull-up;
Marek Vasut526c9512020-03-31 19:51:36 +0200[diff] [blame]96 };
97};
98
99&usbotg_hs {
100 u-boot,force-b-session-valid;
101 hnp-srp-disable;
102};
Marek Vasutbc3e3f02022-02-03 02:49:29 +0100[diff] [blame]103
Marek Vasut69e89952022-09-23 03:31:22 +0200[diff] [blame]104&vdd {
105 /delete-property/ regulator-always-on;
106};
107
Marek Vasutbc3e3f02022-02-03 02:49:29 +0100[diff] [blame]108&vdd_io {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]109 bootph-pre-ram;
Marek Vasutbc3e3f02022-02-03 02:49:29 +0100[diff] [blame]110};