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Scott McNutt4a889822010-03-19 19:03:28 -04001/*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Scott McNutt4a889822010-03-19 19:03:28 -04006 */
7
Scott McNutt4a889822010-03-19 19:03:28 -04008#include <common.h>
Thomas Chou6917a5d2015-10-21 21:26:54 +08009#include <dm.h>
10#include <errno.h>
Scott McNutt4a889822010-03-19 19:03:28 -040011#include <asm/io.h>
Marek Vasute9d0e3c2012-09-13 16:49:51 +020012#include <linux/compiler.h>
13#include <serial.h>
Scott McNutt4a889822010-03-19 19:03:28 -040014
Thomas Chou6917a5d2015-10-21 21:26:54 +080015struct altera_uart_regs {
16 u32 rxdata; /* Rx data reg */
17 u32 txdata; /* Tx data reg */
18 u32 status; /* Status reg */
19 u32 control; /* Control reg */
20 u32 divisor; /* Baud rate divisor reg */
21 u32 endofpacket; /* End-of-packet reg */
22};
Thomas Chou769cb5c2014-08-25 16:50:14 +080023
Thomas Chou6917a5d2015-10-21 21:26:54 +080024struct altera_uart_platdata {
25 struct altera_uart_regs *regs;
26 unsigned int uartclk;
27};
Thomas Chou769cb5c2014-08-25 16:50:14 +080028
Thomas Chou6917a5d2015-10-21 21:26:54 +080029/* status register */
30#define ALTERA_UART_TMT (1 << 5) /* tx empty */
31#define ALTERA_UART_TRDY (1 << 6) /* tx ready */
32#define ALTERA_UART_RRDY (1 << 7) /* rx ready */
Thomas Chou769cb5c2014-08-25 16:50:14 +080033
Scott McNutt4a889822010-03-19 19:03:28 -040034DECLARE_GLOBAL_DATA_PTR;
35
Thomas Chou6917a5d2015-10-21 21:26:54 +080036static int altera_uart_setbrg(struct udevice *dev, int baudrate)
37{
38 struct altera_uart_platdata *plat = dev->platdata;
39 struct altera_uart_regs *const regs = plat->regs;
40 u32 div;
Scott McNutt4a889822010-03-19 19:03:28 -040041
Thomas Chou6917a5d2015-10-21 21:26:54 +080042 div = (plat->uartclk / baudrate) - 1;
43 writel(div, &regs->divisor);
Scott McNutt4a889822010-03-19 19:03:28 -040044
Thomas Chou6917a5d2015-10-21 21:26:54 +080045 return 0;
Marek Vasute9d0e3c2012-09-13 16:49:51 +020046}
47
Thomas Chou6917a5d2015-10-21 21:26:54 +080048static int altera_uart_putc(struct udevice *dev, const char ch)
Marek Vasute9d0e3c2012-09-13 16:49:51 +020049{
Thomas Chou6917a5d2015-10-21 21:26:54 +080050 struct altera_uart_platdata *plat = dev->platdata;
51 struct altera_uart_regs *const regs = plat->regs;
52
53 if (!(readl(&regs->status) & ALTERA_UART_TRDY))
54 return -EAGAIN;
55
56 writel(ch, &regs->txdata);
57
Marek Vasute9d0e3c2012-09-13 16:49:51 +020058 return 0;
59}
Scott McNutt4a889822010-03-19 19:03:28 -040060
Thomas Chou6917a5d2015-10-21 21:26:54 +080061static int altera_uart_pending(struct udevice *dev, bool input)
Scott McNutt4a889822010-03-19 19:03:28 -040062{
Thomas Chou6917a5d2015-10-21 21:26:54 +080063 struct altera_uart_platdata *plat = dev->platdata;
64 struct altera_uart_regs *const regs = plat->regs;
65 u32 st = readl(&regs->status);
Scott McNutt4a889822010-03-19 19:03:28 -040066
Thomas Chou6917a5d2015-10-21 21:26:54 +080067 if (input)
68 return st & ALTERA_UART_RRDY ? 1 : 0;
69 else
70 return !(st & ALTERA_UART_TMT);
Scott McNutt4a889822010-03-19 19:03:28 -040071}
72
Thomas Chou6917a5d2015-10-21 21:26:54 +080073static int altera_uart_getc(struct udevice *dev)
Scott McNutt4a889822010-03-19 19:03:28 -040074{
Thomas Chou6917a5d2015-10-21 21:26:54 +080075 struct altera_uart_platdata *plat = dev->platdata;
76 struct altera_uart_regs *const regs = plat->regs;
Scott McNutt4a889822010-03-19 19:03:28 -040077
Thomas Chou6917a5d2015-10-21 21:26:54 +080078 if (!(readl(&regs->status) & ALTERA_UART_RRDY))
79 return -EAGAIN;
Scott McNutt4a889822010-03-19 19:03:28 -040080
Thomas Chou6917a5d2015-10-21 21:26:54 +080081 return readl(&regs->rxdata) & 0xff;
Scott McNutt4a889822010-03-19 19:03:28 -040082}
83
Thomas Chou6917a5d2015-10-21 21:26:54 +080084static int altera_uart_probe(struct udevice *dev)
Scott McNutt4a889822010-03-19 19:03:28 -040085{
Thomas Chou6917a5d2015-10-21 21:26:54 +080086 return 0;
Scott McNutt4a889822010-03-19 19:03:28 -040087}
88
Thomas Chou6917a5d2015-10-21 21:26:54 +080089static int altera_uart_ofdata_to_platdata(struct udevice *dev)
Scott McNutt4a889822010-03-19 19:03:28 -040090{
Thomas Chou6917a5d2015-10-21 21:26:54 +080091 struct altera_uart_platdata *plat = dev_get_platdata(dev);
92
93 plat->regs = ioremap(dev_get_addr(dev),
94 sizeof(struct altera_uart_regs));
95 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
96 "clock-frequency", 0);
97
98 return 0;
Scott McNutt4a889822010-03-19 19:03:28 -040099}
Marek Vasute9d0e3c2012-09-13 16:49:51 +0200100
Thomas Chou6917a5d2015-10-21 21:26:54 +0800101static const struct dm_serial_ops altera_uart_ops = {
102 .putc = altera_uart_putc,
103 .pending = altera_uart_pending,
104 .getc = altera_uart_getc,
105 .setbrg = altera_uart_setbrg,
106};
107
108static const struct udevice_id altera_uart_ids[] = {
109 { .compatible = "altr,uart-1.0", },
110 { }
111};
112
113U_BOOT_DRIVER(altera_uart) = {
114 .name = "altera_uart",
115 .id = UCLASS_SERIAL,
116 .of_match = altera_uart_ids,
117 .ofdata_to_platdata = altera_uart_ofdata_to_platdata,
118 .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata),
119 .probe = altera_uart_probe,
120 .ops = &altera_uart_ops,
121 .flags = DM_FLAG_PRE_RELOC,
Marek Vasute9d0e3c2012-09-13 16:49:51 +0200122};
123
Thomas Chou6917a5d2015-10-21 21:26:54 +0800124#ifdef CONFIG_DEBUG_UART_ALTERA_UART
125
126#include <debug_uart.h>
127
128void debug_uart_init(void)
Marek Vasute9d0e3c2012-09-13 16:49:51 +0200129{
Thomas Chou6917a5d2015-10-21 21:26:54 +0800130 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
131 u32 div;
132
133 div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
134 writel(div, &regs->divisor);
Marek Vasute9d0e3c2012-09-13 16:49:51 +0200135}
136
Thomas Chou6917a5d2015-10-21 21:26:54 +0800137static inline void _debug_uart_putc(int ch)
Marek Vasute9d0e3c2012-09-13 16:49:51 +0200138{
Thomas Chou6917a5d2015-10-21 21:26:54 +0800139 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
140
141 while (1) {
142 u32 st = readl(&regs->status);
143
144 if (st & ALTERA_UART_TRDY)
145 break;
146 }
147
148 writel(ch, &regs->txdata);
Marek Vasute9d0e3c2012-09-13 16:49:51 +0200149}
Thomas Chou6917a5d2015-10-21 21:26:54 +0800150
151DEBUG_UART_FUNCS
152
153#endif