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git01.mediatek.com / filogic / uboot / 685dc1b19e08d47545a4874eaa393846f6db741d / . / arch / arm / dts / am335x-pxm2.dtsi
blob: d9243d5d3d96dc757eb001d5e801195971ea9d9e [file] [log] [blame]
Heiko Schocher107ef972016-06-13 15:16:01 +0200[diff] [blame]1/*
2 * Copyright (C) 2014 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
4 *
5 * Based on:
6 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include "am33xx.dtsi"
14#include <dt-bindings/input/input.h>
15
16/ {
17 chosen {
18 stdout-path = &uart0;
19 tick-timer = &timer2;
20 };
21
22 cpus {
23 cpu@0 {
24 cpu0-supply = <&vdd1_reg>;
25 };
26 };
27
28 backlight0: backlight {
29 compatible = "pwm-backlight";
30 pwms = <&ecap0 0 50000 0>;
31 brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
32 38 40 43 45 48 51 53 56 58 61 63 66 68 71
33 73 76 79 81 84 86 89 91 94 96 99 102 104
34 107 109 112 114 117 119 122 124 127 130
35 132 135 137 140 142 145 147 150 153 155
36 158 160 163 165 168 170 173 175 178 181
37 183 186 188 191 193 196 198 201 204 206
38 209 211 214 216 219 221 224 226 229 232
39 234 237 239 242 244 247 249 252 255>;
40 default-brightness-level = <80>;
41 power-supply = <&backlight_reg>;
42 enable-gpios = <&gpio3 16 0>;
43 };
44
45 backlight_reg: fixedregulator0 {
46 compatible = "regulator-fixed";
47 regulator-name = "backlight_reg";
48 regulator-boot-on;
49 };
50
51 gpio_keys: restart-keys {
52 compatible = "gpio-keys";
Heiko Schocher107ef972016-06-13 15:16:01 +0200[diff] [blame]53 autorepeat;
54
55 restart0 {
56 label = "restart";
57 linux,code = <KEY_RESTART>;
58 gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
59 gpio-key,wakeup;
60 };
61 };
62
63 leds {
64 compatible = "gpio-leds";
65
66 led_blue {
67 label = "blue";
68 gpios = <&gpio3 20 0>;
69 };
70 led_green {
71 label = "green";
72 gpios = <&gpio1 31 0>;
73 };
74 led_red {
75 label = "red";
76 gpios = <&gpio3 21 0>;
77 };
78 };
79
80 memory {
81 device_type = "memory";
82 reg = <0x80000000 0x10000000>; /* 256 MB */
83 };
84
85 reg_lcd_3v3: fixedregulator1 {
86 compatible = "regulator-gpio";
87 regulator-name = "lcd-3v3";
88 regulator-min-microvolt = <1800000>;
89 regulator-max-microvolt = <3300000>;
90 regulator-type = "voltage";
91 startup-delay-us = <100>;
92 states = <1800000 0x1
93 2900000 0x0>;
94 enable-at-boot;
95 gpios = <&gpio3 19 0>;
96 enable-active-high;
97 };
98
99 vbat: fixedregulator2 {
100 compatible = "regulator-fixed";
101 regulator-name = "vbat";
102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <5000000>;
104 regulator-boot-on;
105 };
106
107 vmmc: fixedregulator3 {
108 compatible = "regulator-fixed";
109 regulator-name = "vmmc";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
112 };
113};
114
115&cppi41dma {
116 status = "okay";
117};
118
119&cpsw_emac0 {
120 phy_id = <&davinci_mdio>, <0>;
121 phy-mode = "rgmii-txid";
122};
123
124&cpsw_emac1 {
125 phy_id = <&davinci_mdio>, <1>;
126 phy-mode = "rgmii-txid";
127};
128
129&davinci_mdio {
130 pinctrl-names = "default", "sleep";
131 pinctrl-0 = <&davinci_mdio_default>;
132 pinctrl-1 = <&davinci_mdio_sleep>;
133 status = "okay";
134};
135
136&elm {
137 status = "okay";
138};
139
140&epwmss0 {
141 status = "okay";
142
143 ecap0: ecap@48300100 {
144 status = "okay";
145 pinctrl-names = "default";
146 pinctrl-0 = <&ecap0_pins>;
147 };
148};
149
150&gpmc {
151 pinctrl-names = "default";
152 pinctrl-0 = <&nandflash_pins>;
153 status = "okay";
154
155 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
156
157 nand@0,0 {
158 reg = <0 0 0>; /* CS0, offset 0 */
159 nand-bus-width = <8>;
160 ti,nand-ecc-opt = "bch8";
161 gpmc,device-nand = "true";
162 gpmc,device-width = <1>;
163 gpmc,sync-clk-ps = <0>;
164 gpmc,cs-on-ns = <0>;
165 gpmc,cs-rd-off-ns = <44>;
166 gpmc,cs-wr-off-ns = <44>;
167 gpmc,adv-on-ns = <6>;
168 gpmc,adv-rd-off-ns = <34>;
169 gpmc,adv-wr-off-ns = <44>;
170 gpmc,we-on-ns = <0>;
171 gpmc,we-off-ns = <40>;
172 gpmc,oe-on-ns = <0>;
173 gpmc,oe-off-ns = <54>;
174 gpmc,access-ns = <64>;
175 gpmc,rd-cycle-ns = <82>;
176 gpmc,wr-cycle-ns = <82>;
177 gpmc,wait-on-read = "true";
178 gpmc,wait-on-write = "true";
179 gpmc,bus-turnaround-ns = <0>;
180 gpmc,cycle2cycle-delay-ns = <0>;
181 gpmc,clk-activation-ns = <0>;
182 gpmc,wait-monitoring-ns = <0>;
183 gpmc,wr-access-ns = <40>;
184 gpmc,wr-data-mux-bus-ns = <0>;
185
186 #address-cells = <1>;
187 #size-cells = <1>;
188 elm_id = <&elm>;
189 };
190};
191
192&i2c0 {
193 pinctrl-names = "default";
194 pinctrl-0 = <&i2c0_pins>;
195 clock-frequency = <400000>;
196 status = "okay";
197
198 tps: tps@2d {
199 reg = <0x2d>;
200 };
201 eeprom: eeprom@50 {
202 compatible = "atmel,24c128";
203 reg = <0x50>;
204 pagesize = <32>;
205 };
206};
207
208&i2c1 {
209 pinctrl-names = "default";
210 pinctrl-0 = <&i2c1_pins>;
211 clock-frequency = <100000>;
212 status = "okay";
213
214 tsl2563: tsl2563@49 {
215 compatible = "amstaos,tsl2563";
216 reg = <0x49>;
217 };
218};
219
220&i2c2 {
221 pinctrl-names = "default";
222 pinctrl-0 = <&i2c2_pins>;
223 clock-frequency = <100000>;
224 status = "okay";
225
226 egalax_ts@04 {
227 compatible = "eeti,egalax_ts";
228 reg = <0x04>;
229 interrupt-parent = <&gpio1>;
230 interrupts = <24 2>;
231 wakeup-gpios = <&gpio1 25 0>;
232 };
233};
234
235&lcdc {
236 status = "okay";
237};
238
239&mac {
240 pinctrl-names = "default", "sleep";
241 pinctrl-0 = <&cpsw_default>;
242 pinctrl-1 = <&cpsw_sleep>;
243 status = "okay";
244};
245
246&mmc1 {
247 vmmc-supply = <&vmmc>;
248 bus-width = <4>;
249 cd-gpios = <&gpio0 6 0>;
250 wp-gpios = <&gpio3 18 0>;
251 status = "okay";
252};
253
254&phy_sel {
255 rgmii-no-delay;
256};
257
258#include "tps65910.dtsi"
259
260&tps {
261 vcc1-supply = <&vbat>;
262 vcc2-supply = <&vbat>;
263 vcc3-supply = <&vbat>;
264 vcc4-supply = <&vbat>;
265 vcc5-supply = <&vbat>;
266 vcc6-supply = <&vbat>;
267 vcc7-supply = <&vbat>;
268 vccio-supply = <&vbat>;
269
270 regulators {
271 vrtc_reg: regulator@0 {
272 regulator-always-on;
273 };
274
275 vio_reg: regulator@1 {
276 regulator-always-on;
277 };
278
279 vdd1_reg: regulator@2 {
280 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
281 regulator-name = "vdd_mpu";
282 regulator-min-microvolt = <912500>;
283 regulator-max-microvolt = <1312500>;
284 regulator-boot-on;
285 regulator-always-on;
286 };
287
288 vdd2_reg: regulator@3 {
289 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
290 regulator-name = "vdd_core";
291 regulator-min-microvolt = <912500>;
292 regulator-max-microvolt = <1150000>;
293 regulator-boot-on;
294 regulator-always-on;
295 };
296
297 vdd3_reg: regulator@4 {
298 regulator-always-on;
299 };
300
301 vdig1_reg: regulator@5 {
302 regulator-always-on;
303 };
304
305 vdig2_reg: regulator@6 {
306 regulator-always-on;
307 };
308
309 vpll_reg: regulator@7 {
310 regulator-always-on;
311 };
312
313 vdac_reg: regulator@8 {
314 regulator-always-on;
315 };
316
317 vaux1_reg: regulator@9 {
318 regulator-always-on;
319 };
320
321 vaux2_reg: regulator@10 {
322 regulator-always-on;
323 };
324
325 vaux33_reg: regulator@11 {
326 regulator-always-on;
327 };
328
329 vmmc_reg: regulator@12 {
330 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <3300000>;
332 regulator-always-on;
333 };
334 };
335};
336
337&uart0 {
338 pinctrl-names = "default";
339 pinctrl-0 = <&uart0_pins>;
340
341 status = "okay";
342};
343
344&usb {
345 status = "okay";
346};
347
348&usb_ctrl_mod {
349 status = "okay";
350};
351
352&usb0 {
353 status = "okay";
354};
355
356&usb1 {
357 dr_mode = "host";
358 status = "okay";
359};
360
361&usb0_phy {
362 status = "okay";
363};
364
365&usb1_phy {
366 status = "okay";
367};
368
369&am33xx_pinmux {
370 pinctrl-names = "default";
371 pinctrl-0 = <&clkout2_pin &gpio_pin>;
372
373 clkout2_pin: pinmux_clkout2_pin {
374 pinctrl-single,pins = <
375 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
376 >;
377 };
378
379 cpsw_default: cpsw_default {
380 pinctrl-single,pins = <
381 /* Slave 1 */
382 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
383 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
384 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
385 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
386 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
387 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
388 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
389 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
390 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
391 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
392 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
393 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
394 >;
395 };
396
397 cpsw_sleep: cpsw_sleep {
398 pinctrl-single,pins = <
399 /* Slave 1 reset value */
400 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
401 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
402 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
403 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
404 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
405 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
406 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
407 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
408 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
409 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
410 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
411 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
412 >;
413 };
414
415 davinci_mdio_default: davinci_mdio_default {
416 pinctrl-single,pins = <
417 /* MDIO */
418 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
419 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
420 >;
421 };
422
423 davinci_mdio_sleep: davinci_mdio_sleep {
424 pinctrl-single,pins = <
425 /* MDIO reset value */
426 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
427 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
428 >;
429 };
430
431 ecap0_pins: ecap_pins {
432 pinctrl-single,pins = <
433 0x198 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_axr0.gpio3_16 Backlight enable */
434 0x164 (MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
435 >;
436 };
437
438
439 gpio_pin: gpio_pin {
440 pinctrl-single,pins = <
441 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 touch reset */
442 0x60 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 touch irq */
443 0x64 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a9.gpio1_25 touch power */
444 0x6c (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a11.gpio1_27 pad14 to DFU */
445 0x21c (MUX_MODE0) /* usb0_drvvbus */
446 0x234 (MUX_MODE0) /* usb1_drvvbus */
447 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
448 0x160 (PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_sdcd */
449 >;
450 };
451
452 i2c0_pins: pinmux_i2c0_pins {
453 pinctrl-single,pins = <
454 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
455 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
456 >;
457 };
458
459 i2c1_pins: pinmux_i2c1_pins {
460 pinctrl-single,pins = <
461 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
462 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
463 >;
464 };
465
466 i2c2_pins: pinmux_i2c2_pins {
467 pinctrl-single,pins = <
468 0x150 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_sclk.i2c2_sda */
469 0x154 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c2_scl */
470 >;
471 };
472
473 lcd_pins_s0: lcd_pins_s0 {
474 pinctrl-single,pins = <
475 0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
476 0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
477 0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
478 0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
479 0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
480 0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
481 0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
482 0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
483 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
484 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
485 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
486 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
487 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
488 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
489 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
490 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
491 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
492 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
493 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
494 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
495 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
496 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
497 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
498 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
499 0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
500 0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
501 0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
502 0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
503 0x194 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_fsx.gpio3_15 LCD enable */
504 >;
505 };
506
507 nandflash_pins: pinmux_nandflash_pins {
508 pinctrl-single,pins = <
509 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
510 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
511 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
512 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
513 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
514 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
515 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
516 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
517 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
518 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
519 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
520 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
521 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
522 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
523 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
524 >;
525 };
526
527 uart0_pins: pinmux_uart0_pins {
528 pinctrl-single,pins = <
529 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
530 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
531 >;
532 };
533};
534
535&wdt2 {
536 wdt-keep-enabled;
537};