Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 6835b45f5012b9e4478fc70ed640c709ea530bb3 / . / arch / arm / dts / tegra20-medcom-wide.dts
blob: 3d37257189e0acfc19b89562ecd8858d4096271d [file] [log] [blame]
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrene41e11b2013-02-21 12:31:28 +0000[diff] [blame]3#include "tegra20-tamonten.dtsi"
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]4
5/ {
6 model = "Avionic Design Medcom-Wide";
Thierry Reding98a2a7a2012-09-19 00:37:21 +0000[diff] [blame]7 compatible = "ad,medcom-wide", "nvidia,tegra20";
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uartd;
11 };
12
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]13 aliases {
14 usb0 = "/usb@c5008000";
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]15 sdhci0 = "/sdhci@c8000600";
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]16 };
17
18 memory {
19 reg = <0x00000000 0x20000000>;
20 };
21
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]22 host1x@50000000 {
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]23 status = "okay";
24
25 dc@54200000 {
26 status = "okay";
27
28 rgb {
29 nvidia,panel = <&lcd_panel>;
30 status = "okay";
31 };
32 };
33 };
34
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]35 serial@70006300 {
36 clock-frequency = <216000000>;
37 };
38
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]39 usb@c5008000 {
40 status = "okay";
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]41 };
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]42
Simon Glassd8af3c92016-01-30 16:38:01 -0700[diff] [blame]43 pwm: pwm@7000a000 {
44 status = "okay";
45 };
46
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]47 lcd_panel: panel {
48 clock = <61715000>;
49 xres = <1366>;
50 yres = <768>;
51 left-margin = <2>;
52 right-margin = <47>;
53 hsync-len = <136>;
54 lower-margin = <21>;
55 upper-margin = <11>;
56 vsync-len = <4>;
57
58 nvidia,bits-per-pixel = <16>;
59 nvidia,pwm = <&pwm 0 500000>;
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]60 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
61 GPIO_ACTIVE_HIGH>;
62 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
63 GPIO_ACTIVE_HIGH>;
64 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
65 GPIO_ACTIVE_HIGH>;
Thierry Reding5744e292012-11-23 00:58:50 +0000[diff] [blame]66 nvidia,panel-timings = <0 0 0 0>;
67 };
Thierry Redinge7dbeb02012-06-04 20:02:25 +0000[diff] [blame]68};