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git01.mediatek.com / filogic / uboot / 67e767d249967fe9bff88954acdf78fc63daadf5 / . / board / logicpd / imx31_litekit / lowlevel_init.S
blob: 7c456bc4a78ace92f82ba90cd0f634be1147deb3 [file] [log] [blame]
Sascha Hauerce6fc522008-03-26 20:41:09 +0100[diff] [blame]1/*
2 *
3 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Sascha Hauerce6fc522008-03-26 20:41:09 +0100[diff] [blame]6 */
7
Stefano Babic78129d92011-03-14 15:43:56 +0100[diff] [blame]8#include <asm/arch/imx-regs.h>
Sascha Hauerce6fc522008-03-26 20:41:09 +0100[diff] [blame]9
10.macro REG reg, val
11 ldr r2, =\reg
12 ldr r3, =\val
13 str r3, [r2]
14.endm
15
16.macro REG8 reg, val
17 ldr r2, =\reg
18 ldr r3, =\val
19 strb r3, [r2]
20.endm
21
22.macro DELAY loops
23 ldr r2, =\loops
241:
25 subs r2, r2, #1
26 nop
27 bcs 1b
28.endm
29
30.globl lowlevel_init
31lowlevel_init:
32
33 REG IPU_CONF, IPU_CONF_DI_EN
34 REG CCM_CCMR, 0x074B0BF5
35
36 DELAY 0x40000
37
38 REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE
39 REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
40
Benoît Thébaudeaua83d2a92012-08-14 08:43:07 +0000[diff] [blame]41 REG CCM_PDR0, PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) | PDR0_MCU_PODF(0)
Sascha Hauerce6fc522008-03-26 20:41:09 +0100[diff] [blame]42
43 REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0x33) | PLL_MFI(7) | PLL_MFN(0x23)
44 REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
45
46 REG 0x43FAC26C, 0 /* SDCLK */
47 REG 0x43FAC270, 0 /* CAS */
48 REG 0x43FAC274, 0 /* RAS */
Magnus Lilja61ffc742008-06-09 22:58:48 +0200[diff] [blame]49 REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100[diff] [blame]50 REG 0x43FAC284, 0 /* DQM3 */
Magnus Lilja61ffc742008-06-09 22:58:48 +0200[diff] [blame]51 REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100[diff] [blame]52 REG 0x43FAC28C, 0
53 REG 0x43FAC290, 0
54 REG 0x43FAC294, 0
55 REG 0x43FAC298, 0
56 REG 0x43FAC29C, 0
57 REG 0x43FAC2A0, 0
58 REG 0x43FAC2A4, 0
59 REG 0x43FAC2A8, 0
60 REG 0x43FAC2AC, 0
61 REG 0x43FAC2B0, 0
62 REG 0x43FAC2B4, 0
63 REG 0x43FAC2B8, 0
64 REG 0x43FAC2BC, 0
65 REG 0x43FAC2C0, 0
66 REG 0x43FAC2C4, 0
67 REG 0x43FAC2C8, 0
68 REG 0x43FAC2CC, 0
69 REG 0x43FAC2D0, 0
70 REG 0x43FAC2D4, 0
71 REG 0x43FAC2D8, 0
72 REG 0x43FAC2DC, 0
73 REG 0xB8001010, 0x00000004
74 REG 0xB8001004, 0x006ac73a
75 REG 0xB8001000, 0x92100000
76 REG 0x80000f00, 0x12344321
77 REG 0xB8001000, 0xa2100000
78 REG 0x80000000, 0x12344321
79 REG 0x80000000, 0x12344321
80 REG 0xB8001000, 0xb2100000
81 REG8 0x80000033, 0xda
82 REG8 0x81000000, 0xff
83 REG 0xB8001000, 0x82226080
84 REG 0x80000000, 0xDEADBEEF
85 REG 0xB8001010, 0x0000000c
86
87 mov pc, lr