blob: f50da6be724575b33441a85bd3f17f03f7d46e5c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09002/*
3 * Copyright (C) 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09006 */
7
8#include <common.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000011#include <spi.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000012#include <lcd.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090013#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000014#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090015#include <asm/arch/adc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000016#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000017#include <asm/arch/watchdog.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000018#include <ld9040.h>
Simon Glassdbd79542020-05-10 11:40:11 -060019#include <linux/delay.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000020#include <power/pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010021#include <usb.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010022#include <usb/dwc2_udc.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010023#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000024#include <power/max8998_pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010025#include <libtizen.h>
Przemyslaw Marczak94df8012014-01-22 11:24:20 +010026#include <samsung/misc.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010027#include <usb_mass_storage.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060028#include <asm/mach-types.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090029
30DECLARE_GLOBAL_DATA_PTR;
31
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090032unsigned int board_rev;
Jaehoon Chung40195a22017-01-09 14:47:50 +090033static int init_pmic_lcd(void);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090034
35u32 get_board_rev(void)
36{
37 return board_rev;
38}
39
Jaehoon Chung40195a22017-01-09 14:47:50 +090040int exynos_power_init(void)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090041{
Jaehoon Chung40195a22017-01-09 14:47:50 +090042 return init_pmic_lcd();
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090043}
44
Jaehoon Chung40195a22017-01-09 14:47:50 +090045static int get_hwrev(void)
Łukasz Majewski11be2832012-11-13 03:22:17 +000046{
Jaehoon Chung40195a22017-01-09 14:47:50 +090047 return board_rev & 0xFF;
Łukasz Majewski11be2832012-11-13 03:22:17 +000048}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090049
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090050static unsigned short get_adc_value(int channel)
51{
52 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
53 unsigned short ret = 0;
54 unsigned int reg;
55 unsigned int loop = 0;
56
57 writel(channel & 0xF, &adc->adcmux);
58 writel((1 << 14) | (49 << 6), &adc->adccon);
59 writel(1000 & 0xffff, &adc->adcdly);
60 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
61 udelay(10);
62 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
63 udelay(10);
64
65 do {
66 udelay(1);
67 reg = readl(&adc->adccon);
68 } while (!(reg & (1 << 15)) && (loop++ < 1000));
69
70 ret = readl(&adc->adcdat0) & 0xFFF;
71
72 return ret;
73}
74
Łukasz Majewski61f8b402012-03-26 21:53:48 +000075static int adc_power_control(int on)
76{
Jaehoon Chung40195a22017-01-09 14:47:50 +090077 struct udevice *dev;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000078 int ret;
Jaehoon Chung40195a22017-01-09 14:47:50 +090079 u8 reg;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000080
Jaehoon Chung40195a22017-01-09 14:47:50 +090081 ret = pmic_get("max8998-pmic", &dev);
82 if (ret) {
83 puts("Failed to get MAX8998!\n");
84 return ret;
85 }
Łukasz Majewski61f8b402012-03-26 21:53:48 +000086
Jaehoon Chung40195a22017-01-09 14:47:50 +090087 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
88 if (on)
89 reg |= MAX8998_LDO4;
90 else
91 reg &= ~MAX8998_LDO4;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000092
Jaehoon Chung40195a22017-01-09 14:47:50 +090093 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
94 if (ret) {
95 puts("MAX8998 LDO setting error\n");
96 return -EINVAL;
97 }
98
Simon Glass7bbb7d92016-11-23 06:34:40 -070099 return 0;
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000100}
101
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900102static unsigned int get_hw_revision(void)
103{
104 int hwrev, mode0, mode1;
105
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000106 adc_power_control(1);
107
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900108 mode0 = get_adc_value(1); /* HWREV_MODE0 */
109 mode1 = get_adc_value(2); /* HWREV_MODE1 */
110
111 /*
112 * XXX Always set the default hwrev as the latest board
113 * ADC = (voltage) / 3.3 * 4096
114 */
115 hwrev = 3;
116
117#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
118 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
119 hwrev = 0x0; /* 0.01V 0.01V */
120 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
121 hwrev = 0x1; /* 610mV 0.01V */
122 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
123 hwrev = 0x2; /* 1.16V 0.01V */
124 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
125 hwrev = 0x3; /* 1.79V 0.01V */
126#undef IS_RANGE
127
128 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
129
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000130 adc_power_control(0);
131
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900132 return hwrev;
133}
134
135static void check_hw_revision(void)
136{
137 int hwrev;
138
139 hwrev = get_hw_revision();
140
141 board_rev |= hwrev;
142}
143
Lukasz Majewskibf731262011-12-15 10:32:12 +0100144#ifdef CONFIG_USB_GADGET
145static int s5pc210_phy_control(int on)
146{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900147 struct udevice *dev;
148 int ret;
149 u8 reg;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100150
Jaehoon Chung40195a22017-01-09 14:47:50 +0900151 ret = pmic_get("max8998-pmic", &dev);
152 if (ret) {
153 puts("Failed to get MAX8998!\n");
154 return ret;
155 }
Lukasz Majewskibf731262011-12-15 10:32:12 +0100156
157 if (on) {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900158 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
159 reg |= MAX8998_SAFEOUT1;
160 ret |= pmic_reg_write(dev,
161 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
162
163 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
164 reg |= MAX8998_LDO3;
165 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
166
167 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
168 reg |= MAX8998_LDO8;
169 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100170
171 } else {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900172 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
173 reg &= ~MAX8998_LDO8;
174 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
175
176 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
177 reg &= ~MAX8998_LDO3;
178 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
179
180 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
181 reg &= ~MAX8998_SAFEOUT1;
182 ret |= pmic_reg_write(dev,
183 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100184 }
185
186 if (ret) {
187 puts("MAX8998 LDO setting error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900188 return -EINVAL;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100189 }
Jaehoon Chung40195a22017-01-09 14:47:50 +0900190
Lukasz Majewskibf731262011-12-15 10:32:12 +0100191 return 0;
192}
193
Marek Vasut6939aca2015-12-04 02:23:29 +0100194struct dwc2_plat_otg_data s5pc210_otg_data = {
Lukasz Majewskibf731262011-12-15 10:32:12 +0100195 .phy_control = s5pc210_phy_control,
196 .regs_phy = EXYNOS4_USBPHY_BASE,
197 .regs_otg = EXYNOS4_USBOTG_BASE,
198 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
199 .usb_flags = PHY0_SLEEP,
200};
201#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000202
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100203int board_usb_init(int index, enum usb_init_type init)
204{
205 debug("USB_udc_probe\n");
Marek Vasut01b61fa2015-12-04 02:26:33 +0100206 return dwc2_udc_probe(&s5pc210_otg_data);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100207}
208
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100209int exynos_early_init_f(void)
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000210{
211 wdt_stop();
212
213 return 0;
214}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000215
Jaehoon Chung40195a22017-01-09 14:47:50 +0900216static int init_pmic_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000217{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900218 struct udevice *dev;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000219 unsigned char val;
220 int ret = 0;
221
Jaehoon Chung40195a22017-01-09 14:47:50 +0900222 ret = pmic_get("max8998-pmic", &dev);
223 if (ret) {
224 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
225 return ret;
226 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000227
228 /* LDO7 1.8V */
229 val = 0x02; /* (1800 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900230 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000231
232 /* LDO17 3.0V */
233 val = 0xe; /* (3000 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900234 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000235
236 /* Disable unneeded regulators */
237 /*
238 * ONOFF1
239 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
240 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
241 */
242 val = 0xB9;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900243 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000244
245 /* ONOFF2
246 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
247 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
248 */
249 val = 0x50;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900250 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000251
252 /* ONOFF3
253 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
254 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
255 */
256 val = 0x00;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900257 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000258
Jaehoon Chung40195a22017-01-09 14:47:50 +0900259 if (ret) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000260 puts("LCD pmic initialisation error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900261 return -EINVAL;
262 }
263
264 return 0;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000265}
266
Ajay Kumar41022a12013-02-21 23:52:57 +0000267void exynos_cfg_lcd_gpio(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000268{
269 unsigned int i, f3_end = 4;
270
271 for (i = 0; i < 8; i++) {
272 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530273 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
274 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
275 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000276 /* pull-up/down disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530277 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
278 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
279 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000280
281 /* drive strength to max (24bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530282 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
283 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
284 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
285 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
286 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
287 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000288 }
289
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530290 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000291 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530292 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000293 /* pull-up/down disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530294 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000295 /* drive strength to max (24bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530296 gpio_set_drv(i, S5P_GPIO_DRV_4X);
297 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000298 }
299
300 /* gpio pad configuration for LCD reset. */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600301 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530302 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000303}
304
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100305int mipi_power(void)
306{
307 return 0;
308}
309
Ajay Kumar41022a12013-02-21 23:52:57 +0000310void exynos_reset_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000311{
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530312 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000313 udelay(10000);
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530314 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000315 udelay(10000);
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530316 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000317 udelay(100);
318}
319
Ajay Kumar41022a12013-02-21 23:52:57 +0000320void exynos_lcd_power_on(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000321{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900322 struct udevice *dev;
323 int ret;
324 u8 reg;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000325
Jaehoon Chung40195a22017-01-09 14:47:50 +0900326 ret = pmic_get("max8998-pmic", &dev);
327 if (ret) {
328 puts("Failed to get MAX8998!\n");
Minkyu Kang538f26b2012-12-10 22:43:57 +0900329 return;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900330 }
Minkyu Kang538f26b2012-12-10 22:43:57 +0900331
Jaehoon Chung40195a22017-01-09 14:47:50 +0900332 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
333 reg |= MAX8998_LDO17;
334 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
335 if (ret) {
336 puts("MAX8998 LDO setting error\n");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000337 return;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900338 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000339
Jaehoon Chung40195a22017-01-09 14:47:50 +0900340 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
341 reg |= MAX8998_LDO7;
342 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
343 if (ret) {
344 puts("MAX8998 LDO setting error\n");
345 return;
346 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000347}
348
Ajay Kumar41022a12013-02-21 23:52:57 +0000349void exynos_cfg_ldo(void)
350{
351 ld9040_cfg_ldo();
352}
353
354void exynos_enable_ldo(unsigned int onoff)
355{
356 ld9040_enable_ldo(onoff);
357}
358
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100359int exynos_init(void)
Piotr Wilczeke372b552012-10-19 05:34:03 +0000360{
Piotr Wilczeke372b552012-10-19 05:34:03 +0000361 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100362
363 switch (get_hwrev()) {
364 case 0:
365 /*
366 * Set the low to enable LDO_EN
367 * But when you use the test board for eMMC booting
368 * you should set it HIGH since it removes the inverter
369 */
370 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600371 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530372 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100373 break;
374 default:
375 /*
376 * Default reset state is High and there's no inverter
377 * But set it as HIGH to ensure
378 */
379 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600380 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530381 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100382 break;
383 }
Piotr Wilczeke372b552012-10-19 05:34:03 +0000384
Piotr Wilczeke372b552012-10-19 05:34:03 +0000385 check_hw_revision();
386 printf("HW Revision:\t0x%x\n", board_rev);
387
388 return 0;
389}
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100390
Simon Glassb4a967e2016-02-21 21:08:54 -0700391#ifdef CONFIG_LCD
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100392void exynos_lcd_misc_init(vidinfo_t *vid)
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100393{
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100394#ifdef CONFIG_TIZEN
395 get_tizen_logo_info(vid);
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100396#endif
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100397
398 /* for LD9040. */
399 vid->pclk_name = 1; /* MPLL */
400 vid->sclk_div = 1;
401
Simon Glass6a38e412017-08-03 12:22:09 -0600402 env_set("lcdinfo", "lcd=ld9040");
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100403}
Simon Glassb4a967e2016-02-21 21:08:54 -0700404#endif