blob: 2d2c71ad4c495996015de0c792c7063a73a8516a [file] [log] [blame]
developered71a402018-11-15 10:07:53 +08001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2018 MediaTek Inc.
4 */
5
6#ifndef __PRELOADER_H_
7#define __PRELOADER_H_
8
9enum forbidden_mode {
10 F_FACTORY_MODE = 0x0001
11};
12
13union lk_hdr {
14 struct {
15 u32 magic;
16 u32 size;
17 char name[32];
18 u32 loadaddr;
19 };
20
21 u8 data[512];
22};
23
24struct sec_limit {
25 unsigned int magic_num;
26 enum forbidden_mode forbid_mode;
27};
28
29enum bootmode {
30 NORMAL_BOOT = 0,
31 META_BOOT = 1,
32 RECOVERY_BOOT = 2,
33 SW_REBOOT = 3,
34 FACTORY_BOOT = 4,
35 ADVMETA_BOOT = 5,
36 ATE_FACTORY_BOOT = 6,
37 ALARM_BOOT = 7,
38
39 KERNEL_POWER_OFF_CHARGING_BOOT = 8,
40 LOW_POWER_OFF_CHARGING_BOOT = 9,
41
42 FAST_BOOT = 99,
43 DOWNLOAD_BOOT = 100,
44 UNKNOWN_BOOT
45};
46
47enum boot_reason {
48 BR_POWER_KEY = 0,
49 BR_USB,
50 BR_RTC,
51 BR_WDT,
52 BR_WDT_BY_PASS_PWK,
53 BR_TOOL_BY_PASS_PWK,
54 BR_2SEC_REBOOT,
55 BR_UNKNOWN
56};
57
58enum meta_com_type {
59 META_UNKNOWN_COM = 0,
60 META_UART_COM,
61 META_USB_COM
62};
63
64struct da_info_t {
65 u32 addr;
66 u32 arg1;
67 u32 arg2;
68 u32 len;
69 u32 sig_len;
70};
71
72struct boot_argument {
73 u32 magic;
74 enum bootmode boot_mode;
75 u32 e_flag;
76 u32 log_port;
77 u32 log_baudrate;
78 u8 log_enable;
79 u8 part_num;
80 u8 reserved[2];
81 u32 dram_rank_num;
82 u32 dram_rank_size[4];
83 u32 boot_reason;
84 enum meta_com_type meta_com_type;
85 u32 meta_com_id;
86 u32 boot_time;
87 struct da_info_t da_info;
88 struct sec_limit sec_limit;
89 union lk_hdr *part_info;
90 u8 md_type[4];
91 u32 ddr_reserve_enable;
92 u32 ddr_reserve_success;
93 u32 chip_ver;
94 char pl_version[8];
95};
96
97#define BOOT_ARGUMENT_MAGIC 0x504c504c
98
99#endif /* __PRELOADER_H_ */