| Simon Glass | b67c18d | 2019-02-16 20:24:55 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Intel HDA audio codec config. This is a mechanicm to configure codecs when |
| 4 | * using Intel HDA audio. |
| 5 | * |
| 6 | * Copyright 2018 Google LLC |
| 7 | * Written by Simon Glass <sjg@chromium.org> |
| 8 | */ |
| 9 | |
| 10 | #ifndef __AZALIA_H |
| 11 | #define __AZALIA_H |
| 12 | |
| 13 | #define AZALIA_CODEC_SHIFT 28 |
| 14 | #define AZALIA_NID_SHIFT 20 |
| 15 | #define AZALIA_VERB_SHIFT 8 |
| 16 | |
| 17 | /* Supported opcodes */ |
| 18 | #define AZALIA_OPCODE_CONFIG_DEFAULT 0x71c |
| 19 | #define AZALIA_OPCODE_IMPL_ID 0x720 |
| 20 | #define AZALIA_OPCODE_READ_PARAM 0xf00 |
| 21 | |
| 22 | #define AZALIA_PARAM_VENDOR_ID 0 |
| 23 | |
| 24 | /* Generate the register value to write a particular byte of a 32-bit value */ |
| 25 | #define AZALIA_SET_BYTE(codec, nid, opcode, val, byte) \ |
| 26 | ((codec) << AZALIA_CODEC_SHIFT | \ |
| 27 | (nid) << AZALIA_NID_SHIFT | \ |
| 28 | ((opcode) + (byte)) << AZALIA_VERB_SHIFT | \ |
| 29 | (((val) >> ((byte) * 8)) & 0xff)) |
| 30 | |
| 31 | /* Generate the register value to write all bytes of a 32-bit value */ |
| 32 | #define AZALIA_WORD(codec, nid, opcode, val) \ |
| 33 | (AZALIA_SET_BYTE(codec, nid, opcode, val, 0) | \ |
| 34 | AZALIA_SET_BYTE(codec, nid, opcode, val, 1) | \ |
| 35 | AZALIA_SET_BYTE(codec, nid, opcode, val, 2) | \ |
| 36 | AZALIA_SET_BYTE(codec, nid, opcode, val, 3)) |
| 37 | |
| 38 | #define AZALIA_PIN_CFG(codec, nid, val) \ |
| 39 | AZALIA_WORD(codec, nid, AZALIA_OPCODE_CONFIG_DEFAULT, val) |
| 40 | |
| 41 | #define AZALIA_SUBVENDOR(codec, val) \ |
| 42 | AZALIA_WORD(codec, 1, AZALIA_OPCODE_IMPL_ID, val) |
| 43 | |
| 44 | #endif /* __AZALIA_H */ |