| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 2 | /* |
| 3 | * SPL definitions for the i.MX7 SPL |
| 4 | * |
| 5 | * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com |
| 6 | * |
| 7 | * Author: Uri Mashiach <uri.mashiach@compulab.co.il> |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __IMX7_SPL_CONFIG_H |
| 11 | #define __IMX7_SPL_CONFIG_H |
| 12 | |
| 13 | #ifdef CONFIG_SPL |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 14 | /* |
| 15 | * see figure 6-22 in i.MX 7Dual/Solo Reference manuals: |
| 16 | * - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to |
| 17 | * 0x00946C00. |
| 18 | * - Set the stack at the end of the free area section, at 0x00946BB8. |
| 19 | * - The BOOT ROM loads what they consider the firmware image |
| 20 | * which consists of a 4K header in front of us that contains the IVT, DCD |
| Matthias Schiffer | 1cc5730 | 2021-09-28 13:40:52 +0200 | [diff] [blame] | 21 | * and some padding. However, the manual also states that the ROM uses the |
| 22 | * OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use |
| 23 | * this range for stack and malloc, the SPL itself must fit below 0x920000, |
| 24 | * or the image will be truncated in at least some boot modes like USB SDP. |
| 25 | * Thus our max size is really 0x00920000 - 0x00912000. If necessary, |
| 26 | * CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space |
| 27 | * for the SPL, but 56KB should be more than enough for the SPL. |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 28 | */ |
| Matthias Schiffer | 1cc5730 | 2021-09-28 13:40:52 +0200 | [diff] [blame] | 29 | #define CONFIG_SPL_MAX_SIZE 0xE000 |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 30 | #define CONFIG_SPL_STACK 0x00946BB8 |
| 31 | /* |
| Matthias Schiffer | 1cc5730 | 2021-09-28 13:40:52 +0200 | [diff] [blame] | 32 | * Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding) |
| 33 | * The extra padding could be removed, but this value was used historically |
| 34 | * based on an incorrect CONFIG_SPL_MAX_SIZE definition. |
| 35 | * This allows to write the SPL/U-Boot combination generated with |
| 36 | * u-boot-with-spl.imx directly to a boot media (given that boot media specific |
| 37 | * offset is configured properly). |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 38 | */ |
| 39 | #define CONFIG_SPL_PAD_TO 0x11000 |
| 40 | |
| 41 | /* MMC support */ |
| Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 42 | #if defined(CONFIG_SPL_MMC) |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 43 | #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ |
| 44 | #endif |
| 45 | |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 46 | /* Define the payload for FAT/EXT support */ |
| Tien Fong Chee | 6091dd1 | 2019-01-23 14:20:05 +0800 | [diff] [blame] | 47 | #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 48 | # ifdef CONFIG_OF_CONTROL |
| 49 | # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" |
| 50 | # else |
| 51 | # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
| 52 | # endif |
| 53 | #endif |
| 54 | |
| 55 | #define CONFIG_SPL_BSS_START_ADDR 0x88200000 |
| 56 | #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ |
| 57 | #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 |
| 58 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ |
| Uri Mashiach | 5dd4689 | 2017-09-24 09:00:24 +0300 | [diff] [blame] | 59 | |
| 60 | #endif /* CONFIG_SPL */ |
| 61 | |
| 62 | #endif /* __IMX7_SPL_CONFIG_H */ |