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Macpaul Lin0b9b59a2011-10-11 22:33:15 +00001/*
2 * include/asm-nds32/macro.h
3 *
4 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2011 Andes Technology Corporation
6 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __ASM_NDS_MACRO_H
28#define __ASM_NDS_MACRO_H
29#ifdef __ASSEMBLY__
30
31/*
32 * These macros provide a convenient way to write 8, 16 and 32 bit data
33 * to an "immediate address (address used by periphal)" only.
34 * Registers r4 and r5 are used, any data in these registers are
35 * overwritten by the macros.
36 * The macros are valid for any NDS32 architecture, they do not implement
37 * any memory barriers so caution is recommended when using these when the
38 * caches are enabled or on a multi-core system.
39 */
40
41.macro write32, addr, data
42 li $r4, addr
43 li $r5, data
44 swi $r5, [$r4]
45.endm
46
47.macro write16, addr, data
48 li $r4, addr
49 li $r5, data
50 shi $r5, [$r4]
51.endm
52
53.macro write8, addr, data
54 li $r4, addr
55 li $r5, data
56 sbi $r5, [$r4]
57.endm
58
59/*
60 * This macro read a value from a register, then do OR operation
61 * (set bit fields) to the value, and then store it back to the register.
62 * Note: Instruction 'ori' supports immediate value up to 15 bits.
63 */
64.macro setbf32, addr, data
65 li $r4, addr
66 lwi $r5, [$r4]
67 li $r6, data
68 or $r5, $r5, $r6
69 swi $r5, [$r4]
70.endm
71
72.macro setbf15, addr, data
73 li $r4, addr
74 lwi $r5, [$r4]
75 ori $r5, $r5, data
76 swi $r5, [$r4]
77.endm
78
79/*
80 * This macro generates a loop that can be used for delays in the code.
81 * Register r4 is used, any data in this register is overwritten by the
82 * macro.
83 * The macro is valid for any NDS32 architeture. The actual time spent in the
84 * loop will vary from CPU to CPU though.
85 */
86
87.macro wait_timer, time
88 li $r4, time
891:
90 nop
91 addi $r4, $r4, -1
92 bnez $r4, 1b
93.endm
94
95#endif /* __ASSEMBLY__ */
96#endif /* __ASM_ARM_MACRO_H */