Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2013 Keymile AG |
| 4 | * Valentin Longchamp <valentin.longchamp@keymile.com> |
| 5 | * |
| 6 | * Copyright 2008-2011 Freescale Semiconductor, Inc. |
| 7 | * |
| 8 | * (C) Copyright 2000 |
| 9 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <common.h> |
| 13 | #include <asm/fsl_law.h> |
| 14 | #include <asm/mmu.h> |
| 15 | |
| 16 | struct law_entry law_table[] = { |
| 17 | #ifdef CONFIG_SYS_BMAN_MEM_PHYS |
| 18 | SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN), |
| 19 | #endif |
| 20 | #ifdef CONFIG_SYS_QMAN_MEM_PHYS |
| 21 | SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN), |
| 22 | #endif |
| 23 | #ifdef CONFIG_SYS_DCSRBAR_PHYS |
| 24 | /* Limit DCSR to 32M to access NPC Trace Buffer */ |
| 25 | SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), |
| 26 | #endif |
| 27 | #ifdef CONFIG_SYS_NAND_BASE_PHYS |
| 28 | SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC), |
| 29 | #endif |
| 30 | SET_LAW(CONFIG_SYS_QRIO_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC), |
| 31 | #ifdef CONFIG_SYS_LBAPP1_BASE_PHYS |
| 32 | SET_LAW(CONFIG_SYS_LBAPP1_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), |
| 33 | #endif |
| 34 | #ifdef CONFIG_SYS_LBAPP2_BASE_PHYS |
| 35 | SET_LAW(CONFIG_SYS_LBAPP2_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC), |
| 36 | #endif |
| 37 | }; |
| 38 | |
| 39 | int num_law_entries = ARRAY_SIZE(law_table); |