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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Christophe Kerello275f7062017-09-13 18:00:08 +02002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Christophe Kerello275f7062017-09-13 18:00:08 +02005 */
6
7#include <common.h>
8#include <dm.h>
9#include <misc.h>
Patrice Chotard03f10a12017-11-15 13:14:51 +010010#include <stm32_rcc.h>
11#include <dm/device-internal.h>
Christophe Kerello275f7062017-09-13 18:00:08 +020012#include <dm/lists.h>
13
Patrice Chotard7264aae2018-04-11 17:07:45 +020014struct stm32_rcc_clk stm32_rcc_clk_f42x = {
Patrice Chotard03f10a12017-11-15 13:14:51 +010015 .drv_name = "stm32fx_rcc_clock",
Patrice Chotard7264aae2018-04-11 17:07:45 +020016 .soc = STM32F42X,
Patrice Chotard03f10a12017-11-15 13:14:51 +010017};
18
Patrice Chotard7264aae2018-04-11 17:07:45 +020019struct stm32_rcc_clk stm32_rcc_clk_f469 = {
20 .drv_name = "stm32fx_rcc_clock",
21 .soc = STM32F469,
22};
23
Patrice Chotard03f10a12017-11-15 13:14:51 +010024struct stm32_rcc_clk stm32_rcc_clk_f7 = {
25 .drv_name = "stm32fx_rcc_clock",
26 .soc = STM32F7,
27};
28
29struct stm32_rcc_clk stm32_rcc_clk_h7 = {
30 .drv_name = "stm32h7_rcc_clock",
31};
32
Christophe Kerello275f7062017-09-13 18:00:08 +020033static int stm32_rcc_bind(struct udevice *dev)
34{
Christophe Kerello275f7062017-09-13 18:00:08 +020035 struct udevice *child;
Patrice Chotard03f10a12017-11-15 13:14:51 +010036 struct driver *drv;
37 struct stm32_rcc_clk *rcc_clk =
38 (struct stm32_rcc_clk *)dev_get_driver_data(dev);
39 int ret;
Christophe Kerello275f7062017-09-13 18:00:08 +020040
41 debug("%s(dev=%p)\n", __func__, dev);
42
Patrice Chotard03f10a12017-11-15 13:14:51 +010043 drv = lists_driver_lookup_name(rcc_clk->drv_name);
44 if (!drv) {
45 debug("Cannot find driver '%s'\n", rcc_clk->drv_name);
46 return -ENOENT;
47 }
48
49 ret = device_bind_with_driver_data(dev, drv, rcc_clk->drv_name,
50 rcc_clk->soc,
51 dev_ofnode(dev), &child);
52
Christophe Kerello275f7062017-09-13 18:00:08 +020053 if (ret)
54 return ret;
55
Patrice Chotard03f10a12017-11-15 13:14:51 +010056#ifdef CONFIG_SPL_BUILD
57 return 0;
58#else
Christophe Kerello275f7062017-09-13 18:00:08 +020059 return device_bind_driver_to_node(dev, "stm32_rcc_reset",
60 "stm32_rcc_reset",
61 dev_ofnode(dev), &child);
Patrice Chotard03f10a12017-11-15 13:14:51 +010062#endif
Christophe Kerello275f7062017-09-13 18:00:08 +020063}
64
65static const struct misc_ops stm32_rcc_ops = {
66};
67
68static const struct udevice_id stm32_rcc_ids[] = {
Patrice Chotard7264aae2018-04-11 17:07:45 +020069 {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x },
70 {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 },
Patrice Chotard03f10a12017-11-15 13:14:51 +010071 {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 },
72 {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 },
Christophe Kerello275f7062017-09-13 18:00:08 +020073 { }
74};
75
76U_BOOT_DRIVER(stm32_rcc) = {
77 .name = "stm32-rcc",
78 .id = UCLASS_MISC,
79 .of_match = stm32_rcc_ids,
80 .bind = stm32_rcc_bind,
81 .ops = &stm32_rcc_ops,
82};