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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Heiko Schocher2b387762014-07-18 06:07:19 +02002/*
3 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
Robert P. J. Day1f8378a2016-09-13 08:35:18 -04006 * Basic support for the pwm module on imx6.
Heiko Schocher2b387762014-07-18 06:07:19 +02007 */
8
9#include <common.h>
10#include <div64.h>
11#include <pwm.h>
12#include <asm/arch/imx-regs.h>
13#include <asm/io.h>
14#include "pwm-imx-util.h"
15
16int pwm_init(int pwm_id, int div, int invert)
17{
18 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
19
Axel Linecae6442015-05-23 15:16:48 +080020 if (!pwm)
21 return -1;
22
Heiko Schocher2b387762014-07-18 06:07:19 +020023 writel(0, &pwm->ir);
24 return 0;
25}
26
27int pwm_config(int pwm_id, int duty_ns, int period_ns)
28{
29 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
30 unsigned long period_cycles, duty_cycles, prescale;
31 u32 cr;
32
Axel Linecae6442015-05-23 15:16:48 +080033 if (!pwm)
34 return -1;
35
Heiko Schocher2b387762014-07-18 06:07:19 +020036 pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
37 &prescale);
38
39 cr = PWMCR_PRESCALER(prescale) |
40 PWMCR_DOZEEN | PWMCR_WAITEN |
41 PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;
42
43 writel(cr, &pwm->cr);
44 /* set duty cycles */
45 writel(duty_cycles, &pwm->sar);
46 /* set period cycles */
47 writel(period_cycles, &pwm->pr);
48 return 0;
49}
50
51int pwm_enable(int pwm_id)
52{
53 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
54
Axel Linecae6442015-05-23 15:16:48 +080055 if (!pwm)
56 return -1;
57
Heiko Schocher2b387762014-07-18 06:07:19 +020058 setbits_le32(&pwm->cr, PWMCR_EN);
59 return 0;
60}
61
62void pwm_disable(int pwm_id)
63{
64 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
65
Axel Linecae6442015-05-23 15:16:48 +080066 if (!pwm)
67 return;
68
Heiko Schocher2b387762014-07-18 06:07:19 +020069 clrbits_le32(&pwm->cr, PWMCR_EN);
70}