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Mike Frysinger66c4cf42008-02-04 19:26:55 -05001/* DO NOT EDIT THIS FILE
2 * Automatically generated by generate-def-headers.xsl
3 * DO NOT EDIT THIS FILE
4 */
5
6#ifndef __BFIN_DEF_ADSP_BF532_proc__
7#define __BFIN_DEF_ADSP_BF532_proc__
8
9#include "../mach-common/ADSP-EDN-core_def.h"
10
11#include "../mach-common/ADSP-EDN-extended_def.h"
12
13#define L1_INST_SRAM 0xFFA08000 /* 0xFFA08000 -> 0xFFA0BFFF Instruction Bank A SRAM */
14#define L1_INST_SRAM_SIZE (0xFFA0BFFF - 0xFFA08000 + 1)
15#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
16#define L1_SRAM_SCRATCH 0xFFB00000 /* 0xFFB00000 -> 0xFFB00FFF Scratchpad SRAM */
17#define L1_SRAM_SCRATCH_SIZE (0xFFB00FFF - 0xFFB00000 + 1)
18#define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE)
19#define SYSMMR_BASE 0xFFC00000 /* 0xFFC00000 -> 0xFFFFFFFF MMR registers */
20#define SYSMMR_BASE_SIZE (0xFFFFFFFF - 0xFFC00000 + 1)
21#define SYSMMR_BASE_END (SYSMMR_BASE + SYSMMR_BASE_SIZE)
22
23#endif /* __BFIN_DEF_ADSP_BF532_proc__ */