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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: SMI (Smart Multimedia Interface) Common
9
10maintainers:
11 - Yong Wu <yong.wu@mediatek.com>
12
13description: |
14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
15
16 MediaTek SMI have two generations of HW architecture, here is the list
17 which generation the SoCs use:
18 generation 1: mt2701 and mt7623.
19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
20
21 There's slight differences between the two SMI, for generation 2, the
22 register which control the iommu port is at each larb's register base. But
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
25 SMI generation 1 to transform the smi clock into emi clock domain, but that is
26 not needed for SMI generation 2.
27
28properties:
29 compatible:
30 oneOf:
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
35 - mediatek,mt6795-smi-common
36 - mediatek,mt8167-smi-common
37 - mediatek,mt8173-smi-common
38 - mediatek,mt8183-smi-common
39 - mediatek,mt8186-smi-common
40 - mediatek,mt8188-smi-common-vdo
41 - mediatek,mt8188-smi-common-vpp
42 - mediatek,mt8192-smi-common
43 - mediatek,mt8195-smi-common-vdo
44 - mediatek,mt8195-smi-common-vpp
45 - mediatek,mt8195-smi-sub-common
46 - mediatek,mt8365-smi-common
47
48 - description: for mt7623
49 items:
50 - const: mediatek,mt7623-smi-common
51 - const: mediatek,mt2701-smi-common
52
53 reg:
54 maxItems: 1
55
56 power-domains:
57 maxItems: 1
58
59 clocks:
60 description: |
61 apb and smi are mandatory. the async is only for generation 1 smi HW.
62 gals(global async local sync) also is optional, see below.
63 minItems: 2
64 items:
65 - description: apb is Advanced Peripheral Bus clock, It's the clock for
66 setting the register.
67 - description: smi is the clock for transfer data and command.
68 - description: Either asynchronous clock to help transform the smi clock
69 into the emi clock domain on Gen1 h/w, or the path0 clock of gals.
70 - description: gals1 is the path1 clock of gals.
71
72 clock-names:
73 minItems: 2
74 maxItems: 4
75
76 mediatek,smi:
77 $ref: /schemas/types.yaml#/definitions/phandle
78 description: a phandle to the smi-common node above. Only for sub-common.
79
80required:
81 - compatible
82 - reg
83 - power-domains
84 - clocks
85 - clock-names
86
87allOf:
88 - if: # only for gen1 HW
89 properties:
90 compatible:
91 contains:
92 enum:
93 - mediatek,mt2701-smi-common
94 then:
95 properties:
96 clocks:
97 minItems: 3
98 maxItems: 3
99 clock-names:
100 items:
101 - const: apb
102 - const: smi
103 - const: async
104
105 - if: # only for sub common
106 properties:
107 compatible:
108 contains:
109 enum:
110 - mediatek,mt8195-smi-sub-common
111 then:
112 required:
113 - mediatek,smi
114 properties:
115 clocks:
116 minItems: 3
117 maxItems: 3
118 clock-names:
119 items:
120 - const: apb
121 - const: smi
122 - const: gals0
123 else:
124 properties:
125 mediatek,smi: false
126
127 - if: # for gen2 HW that have gals
128 properties:
129 compatible:
130 enum:
131 - mediatek,mt6779-smi-common
132 - mediatek,mt8183-smi-common
133 - mediatek,mt8186-smi-common
134 - mediatek,mt8192-smi-common
135 - mediatek,mt8195-smi-common-vdo
136 - mediatek,mt8195-smi-common-vpp
137 - mediatek,mt8365-smi-common
138
139 then:
140 properties:
141 clocks:
142 minItems: 4
143 maxItems: 4
144 clock-names:
145 items:
146 - const: apb
147 - const: smi
148 - const: gals0
149 - const: gals1
150
151 - if: # for gen2 HW that don't have gals
152 properties:
153 compatible:
154 enum:
155 - mediatek,mt2712-smi-common
156 - mediatek,mt6795-smi-common
157 - mediatek,mt8167-smi-common
158 - mediatek,mt8173-smi-common
159
160 then:
161 properties:
162 clocks:
163 minItems: 2
164 maxItems: 2
165 clock-names:
166 items:
167 - const: apb
168 - const: smi
169
170additionalProperties: false
171
172examples:
173 - |+
174 #include <dt-bindings/clock/mt8173-clk.h>
175 #include <dt-bindings/power/mt8173-power.h>
176
177 smi_common: smi@14022000 {
178 compatible = "mediatek,mt8173-smi-common";
179 reg = <0x14022000 0x1000>;
180 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
181 clocks = <&mmsys CLK_MM_SMI_COMMON>,
182 <&mmsys CLK_MM_SMI_COMMON>;
183 clock-names = "apb", "smi";
184 };