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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ingenic SoCs NAND / External Memory Controller (NEMC)
8
9maintainers:
10 - Paul Cercueil <paul@crapouillou.net>
11
12properties:
13 $nodename:
14 pattern: "^memory-controller@[0-9a-f]+$"
15
16 compatible:
17 oneOf:
18 - enum:
19 - ingenic,jz4740-nemc
20 - ingenic,jz4780-nemc
21 - items:
22 - const: ingenic,jz4725b-nemc
23 - const: ingenic,jz4740-nemc
24
25 "#address-cells":
26 const: 2
27
28 "#size-cells":
29 const: 1
30
31 ranges: true
32
33 reg:
34 maxItems: 1
35
36 clocks:
37 maxItems: 1
38
39patternProperties:
40 ".*@[0-9]+$":
41 type: object
42 $ref: mc-peripheral-props.yaml#
43 additionalProperties: true
44
45required:
46 - compatible
47 - "#address-cells"
48 - "#size-cells"
49 - ranges
50 - reg
51 - clocks
52
53additionalProperties: false
54
55examples:
56 - |
57 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
58 #include <dt-bindings/gpio/gpio.h>
59 nemc: memory-controller@13410000 {
60 compatible = "ingenic,jz4780-nemc";
61 reg = <0x13410000 0x10000>;
62 #address-cells = <2>;
63 #size-cells = <1>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
70
71 clocks = <&cgu JZ4780_CLK_NEMC>;
72
73 ethernet@6 {
74 compatible = "davicom,dm9000";
75 davicom,no-eeprom;
76
77 pinctrl-names = "default";
78 pinctrl-0 = <&pins_nemc_cs6>;
79
80 reg = <6 0 1>, /* addr */
81 <6 2 1>; /* data */
82
83 ingenic,nemc-tAS = <15>;
84 ingenic,nemc-tAH = <10>;
85 ingenic,nemc-tBP = <20>;
86 ingenic,nemc-tAW = <50>;
87 ingenic,nemc-tSTRV = <100>;
88
89 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
90 vcc-supply = <&eth0_power>;
91
92 interrupt-parent = <&gpe>;
93 interrupts = <19 4>;
94 };
95 };