Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: MediaTek System Control Processor System |
| 8 | |
| 9 | maintainers: |
| 10 | - MandyJH Liu <mandyjh.liu@mediatek.com> |
| 11 | |
| 12 | description: |
| 13 | MediaTek System Control Processor System (SCPSYS) has several |
| 14 | power management tasks. The tasks include MTCMOS power |
| 15 | domain control, thermal measurement, DVFS, etc. |
| 16 | |
| 17 | properties: |
| 18 | compatible: |
| 19 | items: |
| 20 | - enum: |
| 21 | - mediatek,mt8167-scpsys |
| 22 | - mediatek,mt8173-scpsys |
| 23 | - mediatek,mt8183-scpsys |
| 24 | - mediatek,mt8186-scpsys |
| 25 | - mediatek,mt8192-scpsys |
| 26 | - mediatek,mt8195-scpsys |
| 27 | - const: syscon |
| 28 | - const: simple-mfd |
| 29 | |
| 30 | reg: |
| 31 | maxItems: 1 |
| 32 | |
| 33 | power-controller: |
| 34 | $ref: /schemas/power/mediatek,power-controller.yaml# |
| 35 | |
| 36 | required: |
| 37 | - compatible |
| 38 | - reg |
| 39 | |
| 40 | additionalProperties: false |
| 41 | |
| 42 | examples: |
| 43 | - | |
| 44 | #include <dt-bindings/clock/mt8195-clk.h> |
| 45 | #include <dt-bindings/power/mt8195-power.h> |
| 46 | |
| 47 | syscon@10006000 { |
| 48 | compatible = "mediatek,mt8195-scpsys", "syscon", "simple-mfd"; |
| 49 | reg = <0x10006000 0x100>; |
| 50 | |
| 51 | spm: power-controller { |
| 52 | compatible = "mediatek,mt8195-power-controller"; |
| 53 | #address-cells = <1>; |
| 54 | #size-cells = <0>; |
| 55 | #power-domain-cells = <1>; |
| 56 | |
| 57 | /* sample of power domain nodes */ |
| 58 | power-domain@MT8195_POWER_DOMAIN_PCIE_PHY { |
| 59 | reg = <MT8195_POWER_DOMAIN_PCIE_PHY>; |
| 60 | #power-domain-cells = <0>; |
| 61 | }; |
| 62 | |
| 63 | power-domain@MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY { |
| 64 | reg = <MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY>; |
| 65 | #power-domain-cells = <0>; |
| 66 | }; |
| 67 | }; |
| 68 | }; |