| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NVIDIA Tegra210 SoC External Memory Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Thierry Reding <thierry.reding@gmail.com> |
| 11 | - Jon Hunter <jonathanh@nvidia.com> |
| 12 | |
| 13 | description: | |
| 14 | The EMC interfaces with the off-chip SDRAM to service the request stream |
| 15 | sent from the memory controller. |
| 16 | |
| 17 | properties: |
| 18 | compatible: |
| 19 | const: nvidia,tegra210-emc |
| 20 | |
| 21 | reg: |
| 22 | maxItems: 3 |
| 23 | |
| 24 | clocks: |
| 25 | items: |
| 26 | - description: external memory clock |
| 27 | |
| 28 | clock-names: |
| 29 | items: |
| 30 | - const: emc |
| 31 | |
| 32 | interrupts: |
| 33 | items: |
| 34 | - description: EMC general interrupt |
| 35 | |
| 36 | memory-region: |
| 37 | maxItems: 1 |
| 38 | description: |
| 39 | phandle to a reserved memory region describing the table of EMC |
| 40 | frequencies trained by the firmware |
| 41 | |
| 42 | nvidia,memory-controller: |
| 43 | $ref: /schemas/types.yaml#/definitions/phandle |
| 44 | description: |
| 45 | phandle of the memory controller node |
| 46 | |
| 47 | required: |
| 48 | - compatible |
| 49 | - reg |
| 50 | - clocks |
| 51 | - clock-names |
| 52 | - nvidia,memory-controller |
| 53 | |
| 54 | additionalProperties: false |
| 55 | |
| 56 | examples: |
| 57 | - | |
| 58 | #include <dt-bindings/clock/tegra210-car.h> |
| 59 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 60 | |
| 61 | reserved-memory { |
| 62 | #address-cells = <1>; |
| 63 | #size-cells = <1>; |
| 64 | ranges; |
| 65 | |
| 66 | emc_table: emc-table@83400000 { |
| 67 | compatible = "nvidia,tegra210-emc-table"; |
| 68 | reg = <0x83400000 0x10000>; |
| 69 | }; |
| 70 | }; |
| 71 | |
| 72 | external-memory-controller@7001b000 { |
| 73 | compatible = "nvidia,tegra210-emc"; |
| 74 | reg = <0x7001b000 0x1000>, |
| 75 | <0x7001e000 0x1000>, |
| 76 | <0x7001f000 0x1000>; |
| 77 | clocks = <&tegra_car TEGRA210_CLK_EMC>; |
| 78 | clock-names = "emc"; |
| 79 | interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; |
| 80 | memory-region = <&emc_table>; |
| 81 | nvidia,memory-controller = <&mc>; |
| 82 | }; |