| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210) |
| 8 | |
| 9 | maintainers: |
| 10 | - Thierry Reding <thierry.reding@gmail.com> |
| 11 | - Jon Hunter <jonathanh@nvidia.com> |
| 12 | |
| 13 | properties: |
| 14 | compatible: |
| 15 | oneOf: |
| 16 | - enum: |
| 17 | - nvidia,tegra20-gpio |
| 18 | - nvidia,tegra30-gpio |
| 19 | |
| 20 | - items: |
| 21 | - enum: |
| 22 | - nvidia,tegra114-gpio |
| 23 | - nvidia,tegra124-gpio |
| 24 | - nvidia,tegra210-gpio |
| 25 | - const: nvidia,tegra30-gpio |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | interrupts: |
| 31 | description: The interrupt outputs from the controller. For Tegra20, |
| 32 | there should be 7 interrupts specified, and for Tegra30, there should |
| 33 | be 8 interrupts specified. |
| 34 | |
| 35 | "#gpio-cells": |
| 36 | description: The first cell is the pin number and the second cell is used |
| 37 | to specify the GPIO polarity (0 = active high, 1 = active low). |
| 38 | const: 2 |
| 39 | |
| 40 | gpio-controller: true |
| 41 | |
| 42 | gpio-ranges: |
| 43 | maxItems: 1 |
| 44 | |
| 45 | "#interrupt-cells": |
| 46 | description: | |
| 47 | Should be 2. The first cell is the GPIO number. The second cell is |
| 48 | used to specify flags: |
| 49 | |
| 50 | bits[3:0] trigger type and level flags: |
| 51 | 1 = low-to-high edge triggered. |
| 52 | 2 = high-to-low edge triggered. |
| 53 | 4 = active high level-sensitive. |
| 54 | 8 = active low level-sensitive. |
| 55 | |
| 56 | Valid combinations are 1, 2, 3, 4, 8. |
| 57 | const: 2 |
| 58 | |
| 59 | interrupt-controller: true |
| 60 | |
| 61 | allOf: |
| 62 | - if: |
| 63 | properties: |
| 64 | compatible: |
| 65 | contains: |
| 66 | const: nvidia,tegra30-gpio |
| 67 | then: |
| 68 | properties: |
| 69 | interrupts: |
| 70 | minItems: 8 |
| 71 | maxItems: 8 |
| 72 | else: |
| 73 | properties: |
| 74 | interrupts: |
| 75 | minItems: 7 |
| 76 | maxItems: 7 |
| 77 | |
| 78 | required: |
| 79 | - compatible |
| 80 | - reg |
| 81 | - interrupts |
| 82 | - "#gpio-cells" |
| 83 | - gpio-controller |
| 84 | - "#interrupt-cells" |
| 85 | - interrupt-controller |
| 86 | |
| 87 | additionalProperties: |
| 88 | type: object |
| 89 | required: |
| 90 | - gpio-hog |
| 91 | |
| 92 | examples: |
| 93 | - | |
| 94 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 95 | |
| 96 | gpio: gpio@6000d000 { |
| 97 | compatible = "nvidia,tegra20-gpio"; |
| 98 | reg = <0x6000d000 0x1000>; |
| 99 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, |
| 100 | <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, |
| 101 | <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, |
| 102 | <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, |
| 103 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, |
| 104 | <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, |
| 105 | <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; |
| 106 | #gpio-cells = <2>; |
| 107 | gpio-controller; |
| 108 | #interrupt-cells = <2>; |
| 109 | interrupt-controller; |
| 110 | }; |