Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 2 | /****************************************************************************** |
| 3 | * Copyright (c) 2004, 2008 IBM Corporation |
| 4 | * Copyright (c) 2009 Pattrick Hueper <phueper@hueper.net> |
| 5 | * All rights reserved. |
| 6 | * |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 7 | * Contributors: |
| 8 | * IBM Corporation - initial implementation |
| 9 | *****************************************************************************/ |
| 10 | #ifndef _VBE_H |
| 11 | #define _VBE_H |
| 12 | |
| 13 | /* these structs are for input from and output to OF */ |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 14 | struct __packed vbe_screen_info { |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 15 | u8 display_type; /* 0=NONE, 1= analog, 2=digital */ |
| 16 | u16 screen_width; |
| 17 | u16 screen_height; |
| 18 | /* bytes per line in framebuffer, may be more than screen_width */ |
| 19 | u16 screen_linebytes; |
| 20 | u8 color_depth; /* color depth in bits per pixel */ |
| 21 | u32 framebuffer_address; |
| 22 | u8 edid_block_zero[128]; |
| 23 | }; |
| 24 | |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 25 | struct __packed vbe_screen_info_input { |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 26 | u8 signature[4]; |
| 27 | u16 size_reserved; |
| 28 | u8 monitor_number; |
| 29 | u16 max_screen_width; |
| 30 | u8 color_depth; |
| 31 | }; |
| 32 | |
| 33 | /* these structs only store the required a subset of the VBE-defined fields */ |
| 34 | struct __packed vbe_info { |
| 35 | char signature[4]; |
| 36 | u16 version; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 37 | u32 oem_string_ptr; |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 38 | u32 capabilities; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 39 | u32 modes_ptr; |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 40 | u16 total_memory; |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 41 | u16 oem_version; |
| 42 | u32 vendor_name_ptr; |
| 43 | u32 product_name_ptr; |
| 44 | u32 product_rev_ptr; |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | struct __packed vesa_mode_info { |
| 48 | u16 mode_attributes; /* 00 */ |
| 49 | u8 win_a_attributes; /* 02 */ |
| 50 | u8 win_b_attributes; /* 03 */ |
| 51 | u16 win_granularity; /* 04 */ |
| 52 | u16 win_size; /* 06 */ |
| 53 | u16 win_a_segment; /* 08 */ |
| 54 | u16 win_b_segment; /* 0a */ |
| 55 | u32 win_func_ptr; /* 0c */ |
| 56 | u16 bytes_per_scanline; /* 10 */ |
| 57 | u16 x_resolution; /* 12 */ |
| 58 | u16 y_resolution; /* 14 */ |
| 59 | u8 x_charsize; /* 16 */ |
| 60 | u8 y_charsize; /* 17 */ |
| 61 | u8 number_of_planes; /* 18 */ |
| 62 | u8 bits_per_pixel; /* 19 */ |
| 63 | u8 number_of_banks; /* 20 */ |
| 64 | u8 memory_model; /* 21 */ |
| 65 | u8 bank_size; /* 22 */ |
| 66 | u8 number_of_image_pages; /* 23 */ |
| 67 | u8 reserved_page; |
| 68 | u8 red_mask_size; |
| 69 | u8 red_mask_pos; |
| 70 | u8 green_mask_size; |
| 71 | u8 green_mask_pos; |
| 72 | u8 blue_mask_size; |
| 73 | u8 blue_mask_pos; |
| 74 | u8 reserved_mask_size; |
| 75 | u8 reserved_mask_pos; |
| 76 | u8 direct_color_mode_info; |
| 77 | u32 phys_base_ptr; |
| 78 | u32 offscreen_mem_offset; |
| 79 | u16 offscreen_mem_size; |
| 80 | u8 reserved[206]; |
| 81 | }; |
| 82 | |
| 83 | struct vbe_mode_info { |
| 84 | u16 video_mode; |
| 85 | bool valid; |
| 86 | union { |
| 87 | struct vesa_mode_info vesa; |
| 88 | u8 mode_info_block[256]; |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | struct vbe_ddc_info { |
| 93 | u8 port_number; /* i.e. monitor number */ |
| 94 | u8 edid_transfer_time; |
| 95 | u8 ddc_level; |
| 96 | u8 edid_block_zero[128]; |
| 97 | }; |
| 98 | |
| 99 | #define VESA_GET_INFO 0x4f00 |
| 100 | #define VESA_GET_MODE_INFO 0x4f01 |
| 101 | #define VESA_SET_MODE 0x4f02 |
Simon Glass | c55b1c6 | 2014-12-29 19:32:26 -0700 | [diff] [blame] | 102 | #define VESA_GET_CUR_MODE 0x4f03 |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 103 | |
Bin Meng | c8990bd | 2015-08-13 00:29:16 -0700 | [diff] [blame] | 104 | extern struct vbe_mode_info mode_info; |
| 105 | |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 106 | struct video_priv; |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 107 | struct video_uc_plat; |
Bin Meng | 23f5cb5 | 2016-10-09 04:14:15 -0700 | [diff] [blame] | 108 | int vbe_setup_video_priv(struct vesa_mode_info *vesa, |
| 109 | struct video_priv *uc_priv, |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 110 | struct video_uc_plat *plat); |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 111 | int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void)); |
Simon Glass | e518f4e | 2014-11-14 20:56:31 -0700 | [diff] [blame] | 112 | |
| 113 | #endif |