blob: 91b41162de95ea7ed9e6abb47c1c150181c972e6 [file] [log] [blame]
Andreas Bießmanne15757e2011-06-30 22:03:20 +00001/*
2 * Copyright (C) 2011
3 * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Andreas Bießmanne15757e2011-06-30 22:03:20 +00006 */
7#include <common.h>
8
9#include <asm/io.h>
10#include <asm/sdram.h>
11#include <asm/arch/clk.h>
12#include <asm/arch/hmatrix.h>
13#include <asm/arch/mmu.h>
14#include <asm/arch/portmux.h>
15#include <netdev.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
20 {
Andreas Bießmann1e737522015-02-06 23:06:42 +010021 .virt_pgno = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
22 .nr_pages = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
23 .phys = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)
Andreas Bießmanne15757e2011-06-30 22:03:20 +000024 | MMU_VMR_CACHE_NONE,
25 }, {
Andreas Bießmann1e737522015-02-06 23:06:42 +010026 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
27 .nr_pages = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
28 .phys = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)
Andreas Bießmanne15757e2011-06-30 22:03:20 +000029 | MMU_VMR_CACHE_WRBACK,
30 },
31};
32
33static const struct sdram_config sdram_config = {
34 /* Dual MT48LC16M16A2-7E (or equal) */
35 .data_bits = SDRAM_DATA_32BIT,
36 .row_bits = 13,
37 .col_bits = 9,
38 .bank_bits = 2,
39 .cas = 2,
40 .twr = 2,
41 .trc = 7,
42 .trp = 2,
43 .trcd = 2,
44 .tras = 4,
45 .txsr = 7,
46 /* 7.81 us */
47 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
48};
49
50int board_early_init_f(void)
51{
52 /* Enable SDRAM in the EBI mux */
53 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
54
55 portmux_enable_ebi(SDRAM_DATA_32BIT, 23, 0, PORTMUX_DRIVE_HIGH);
Andreas Bießmann662a4f22015-02-06 23:06:43 +010056 sdram_init(uncached(EBI_SDRAM_BASE), &sdram_config);
57
Andreas Bießmanne15757e2011-06-30 22:03:20 +000058 portmux_enable_usart0(PORTMUX_DRIVE_MIN);
59 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
60#if defined(CONFIG_MACB)
Andreas Bießmann0337ce02012-05-25 12:29:32 +020061 /* set PHY reset and pwrdown to low */
62 portmux_select_gpio(PORTMUX_PORT_B, (1 << 29) | (1 << 30),
63 PORTMUX_DIR_OUTPUT | PORTMUX_INIT_LOW);
64 udelay(100);
65 /* release PHYs reset */
66 gpio_set_value(GPIO_PIN_PB(29), 1);
67
Andreas Bießmanne15757e2011-06-30 22:03:20 +000068 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
69#endif
70
71 return 0;
72}
73
Andreas Bießmanne15757e2011-06-30 22:03:20 +000074int board_early_init_r(void)
75{
76 gd->bd->bi_phy_id[0] = 0x00;
77 return 0;
78}
79
80#ifdef CONFIG_CMD_NET
81int board_eth_init(bd_t *bi)
82{
83 macb_eth_initialize(0, (void *)ATMEL_BASE_MACB0, bi->bi_phy_id[0]);
84 return 0;
85}
86#endif
87/* vim: set noet ts=8: */