Wolfgang Denk | 0cbaf64 | 2005-09-25 00:53:22 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * This file contains the configuration parameters for the dbau1x00 board. |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
| 31 | #define CONFIG_MIPS32 1 /* MIPS32 CPU core */ |
| 32 | #define CONFIG_PB1X00 1 |
| 33 | #define CONFIG_AU1X00 1 /* alchemy series cpu */ |
| 34 | |
| 35 | #ifdef CONFIG_PB1000 |
| 36 | #define CONFIG_AU1000 1 |
| 37 | #else |
| 38 | #ifdef CONFIG_PB1100 |
| 39 | #define CONFIG_AU1100 1 |
| 40 | #else |
| 41 | #ifdef CONFIG_PB1500 |
| 42 | #define CONFIG_AU1500 1 |
| 43 | #else |
| 44 | #error "No valid board set" |
| 45 | #endif |
| 46 | #endif |
| 47 | #endif |
| 48 | |
| 49 | #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */ |
| 50 | |
| 51 | #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ |
| 52 | |
| 53 | #define CONFIG_BAUDRATE 115200 |
| 54 | |
| 55 | /* valid baudrates */ |
| 56 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 57 | |
| 58 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
| 59 | #undef CONFIG_BOOTARGS |
| 60 | |
| 61 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 62 | "addmisc=setenv bootargs ${bootargs} " \ |
| 63 | "console=ttyS0,${baudrate} " \ |
Wolfgang Denk | 0cbaf64 | 2005-09-25 00:53:22 +0200 | [diff] [blame] | 64 | "panic=1\0" \ |
| 65 | "bootfile=/vmlinux.img\0" \ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 66 | "load=tftp 80500000 ${u-boot}\0" \ |
Wolfgang Denk | 0cbaf64 | 2005-09-25 00:53:22 +0200 | [diff] [blame] | 67 | "" |
| 68 | /* Boot from NFS root */ |
Wolfgang Denk | 86eb3b7 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 69 | #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm" |
Wolfgang Denk | 0cbaf64 | 2005-09-25 00:53:22 +0200 | [diff] [blame] | 70 | |
| 71 | /* |
| 72 | * Miscellaneous configurable options |
| 73 | */ |
| 74 | #define CFG_LONGHELP /* undef to save memory */ |
| 75 | #define CFG_PROMPT "Pb1x00 # " /* Monitor Command Prompt */ |
| 76 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 77 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 78 | #define CFG_MAXARGS 16 /* max number of command args*/ |
| 79 | |
| 80 | #define CFG_MALLOC_LEN 128*1024 |
| 81 | |
| 82 | #define CFG_BOOTPARAMS_LEN 128*1024 |
| 83 | |
| 84 | #define CFG_HZ 396000000 /* FIXME causes overflow in net.c */ |
| 85 | |
| 86 | #define CFG_SDRAM_BASE 0x80000000 /* Cached addr */ |
| 87 | |
| 88 | #define CFG_LOAD_ADDR 0x81000000 /* default load address */ |
| 89 | |
| 90 | #define CFG_MEMTEST_START 0x80100000 |
| 91 | #undef CFG_MEMTEST_START |
| 92 | #define CFG_MEMTEST_START 0x80200000 |
| 93 | #define CFG_MEMTEST_END 0x83800000 |
| 94 | |
| 95 | /*----------------------------------------------------------------------- |
| 96 | * FLASH and environment organization |
| 97 | */ |
| 98 | #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
| 99 | #define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ |
| 100 | |
| 101 | #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ |
| 102 | #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ |
| 103 | |
| 104 | /* The following #defines are needed to get flash environment right */ |
| 105 | #define CFG_MONITOR_BASE TEXT_BASE |
| 106 | #define CFG_MONITOR_LEN (192 << 10) |
| 107 | |
| 108 | #define CFG_INIT_SP_OFFSET 0x4000000 |
| 109 | |
| 110 | /* We boot from this flash, selected with dip switch */ |
| 111 | #define CFG_FLASH_BASE PHYS_FLASH_2 |
| 112 | |
| 113 | /* timeout values are in ticks */ |
| 114 | #define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */ |
| 115 | #define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */ |
| 116 | |
| 117 | #define CFG_ENV_IS_NOWHERE 1 |
| 118 | |
| 119 | /* Address and size of Primary Environment Sector */ |
| 120 | #define CFG_ENV_ADDR 0xB0030000 |
| 121 | #define CFG_ENV_SIZE 0x10000 |
| 122 | |
| 123 | #define CONFIG_FLASH_16BIT |
| 124 | |
| 125 | #define CONFIG_NR_DRAM_BANKS 2 |
| 126 | |
| 127 | #define CONFIG_NET_MULTI |
| 128 | |
| 129 | #define CONFIG_MEMSIZE_IN_BYTES |
| 130 | |
| 131 | |
| 132 | /*---USB -------------------------------------------*/ |
| 133 | #if 0 |
| 134 | #define CONFIG_USB_OHCI |
| 135 | #define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT |
| 136 | #define CONFIG_USB_STORAGE |
| 137 | #define CONFIG_DOS_PARTITION |
| 138 | #else |
| 139 | #define ADD_USB_CMD 0 |
| 140 | #endif |
| 141 | |
| 142 | /*---ATA PCMCIA ------------------------------------*/ |
| 143 | #if 0 |
| 144 | #define CFG_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ |
| 145 | #define CFG_PCMCIA_MEM_ADDR 0x20000000 |
| 146 | #define CONFIG_PCMCIA_SLOT_A |
| 147 | |
| 148 | #define CONFIG_ATAPI 1 |
| 149 | #define CONFIG_MAC_PARTITION 1 |
| 150 | |
| 151 | /* We run CF in "true ide" mode or a harddrive via pcmcia */ |
| 152 | #define CONFIG_IDE_PCMCIA 1 |
| 153 | |
| 154 | /* We only support one slot for now */ |
| 155 | #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */ |
| 156 | #define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ |
| 157 | |
| 158 | #undef CONFIG_IDE_LED /* LED for ide not supported */ |
| 159 | #undef CONFIG_IDE_RESET /* reset for ide not supported */ |
| 160 | |
| 161 | #define CFG_ATA_IDE0_OFFSET 0x0000 |
| 162 | |
| 163 | #define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR |
| 164 | |
| 165 | /* Offset for data I/O */ |
| 166 | #define CFG_ATA_DATA_OFFSET 8 |
| 167 | |
| 168 | /* Offset for normal register accesses */ |
| 169 | #define CFG_ATA_REG_OFFSET 0 |
| 170 | |
| 171 | /* Offset for alternate registers */ |
| 172 | #define CFG_ATA_ALT_OFFSET 0x0100 |
| 173 | |
| 174 | #endif |
| 175 | /*----------------------------------------------------------------------- |
| 176 | * Cache Configuration |
| 177 | */ |
| 178 | #define CFG_DCACHE_SIZE 16384 |
| 179 | #define CFG_ICACHE_SIZE 16384 |
| 180 | #define CFG_CACHELINE_SIZE 32 |
| 181 | |
| 182 | #define CONFIG_COMMANDS \ |
| 183 | (((CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_ELF | CFG_CMD_MII | CFG_CMD_PING) & \ |
| 184 | ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | CFG_CMD_IDE | \ |
| 185 | CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | CFG_CMD_ELF | \ |
| 186 | CFG_CMD_BDI | CFG_CMD_BEDBUG)) | ADD_USB_CMD) |
| 187 | #include <cmd_confdefs.h> |
| 188 | |
| 189 | #endif /* __CONFIG_H */ |