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Wolfgang Denk97caf672006-03-12 02:12:27 +01001/*
2 * U-boot - ezkit533.c
3 *
4 * Copyright (c) 2005 blackfin.uclinux.org
5 *
6 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#if defined(CONFIG_MISC_INIT_R)
30#include "psd4256.h"
31#endif
32
Wolfgang Denk6405a152006-03-31 18:32:53 +020033DECLARE_GLOBAL_DATA_PTR;
34
Wolfgang Denk97caf672006-03-12 02:12:27 +010035int checkboard(void)
36{
37 printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
38 printf("Board: ADI BF533 EZ-Kit Lite board\n");
39 printf(" Support: http://blackfin.uclinux.org/\n");
40 printf(" Richard Klingler <richard@uclinux.net>\n");
41 return 0;
42}
43
44long int initdram(int board_type)
45{
Wolfgang Denk97caf672006-03-12 02:12:27 +010046#ifdef DEBUG
47 int brate;
48 char *tmp = getenv("baudrate");
49 brate = simple_strtoul(tmp, NULL, 16);
50 printf("Serial Port initialized with Baud rate = %x\n",brate);
51 printf("SDRAM attributes:\n");
52 printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
53 "tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
54 3, 3, 6, 2, 3);
55 printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE);
56 printf("Bank size = %d MB\n", CFG_MAX_RAM_SIZE >> 20);
57#endif
58 gd->bd->bi_memstart = CFG_SDRAM_BASE;
59 gd->bd->bi_memsize = CFG_MAX_RAM_SIZE;
60 return CFG_MAX_RAM_SIZE;
61}
62
63#if defined(CONFIG_MISC_INIT_R)
64/* miscellaneous platform dependent initialisations */
65int misc_init_r(void)
66{
67 /* Set direction bits for Video en/decoder reset as output */
68 *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DIR) = PSDA_VDEC_RST | PSDA_VENC_RST;
69 /* Deactivate Video en/decoder reset lines */
70 *(volatile unsigned char *)(CFG_FLASH1_BASE + PSD_PORTA_DOUT) = PSDA_VDEC_RST | PSDA_VENC_RST;
71}
72#endif