Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007 |
| 4 | * Sascha Hauer, Pengutronix |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Stefano Babic | 78129d9 | 2011-03-14 15:43:56 +0100 | [diff] [blame] | 8 | #include <asm/arch/imx-regs.h> |
Stefano Babic | e17e331 | 2011-02-02 00:49:36 +0000 | [diff] [blame] | 9 | #include <asm/io.h> |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 10 | |
| 11 | #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */ |
| 12 | |
| 13 | /* General purpose timers registers */ |
Guennadi Liakhovetski | 4771a4c | 2008-09-25 20:54:37 +0200 | [diff] [blame] | 14 | #define GPTCR __REG(TIMER_BASE) /* Control register */ |
| 15 | #define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */ |
| 16 | #define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */ |
| 17 | #define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */ |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 18 | |
| 19 | /* General purpose timers bitfields */ |
Guennadi Liakhovetski | 4771a4c | 2008-09-25 20:54:37 +0200 | [diff] [blame] | 20 | #define GPTCR_SWR (1 << 15) /* Software reset */ |
| 21 | #define GPTCR_FRR (1 << 9) /* Freerun / restart */ |
| 22 | #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ |
| 23 | #define GPTCR_TEN 1 /* Timer enable */ |
| 24 | |
Guennadi Liakhovetski | 4771a4c | 2008-09-25 20:54:37 +0200 | [diff] [blame] | 25 | /* The 32768Hz 32-bit timer overruns in 131072 seconds */ |
Fabio Estevam | f231efb | 2011-10-13 05:34:59 +0000 | [diff] [blame] | 26 | int timer_init(void) |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 27 | { |
| 28 | int i; |
| 29 | |
| 30 | /* setup GP Timer 1 */ |
| 31 | GPTCR = GPTCR_SWR; |
Guennadi Liakhovetski | 4771a4c | 2008-09-25 20:54:37 +0200 | [diff] [blame] | 32 | for (i = 0; i < 100; i++) |
| 33 | GPTCR = 0; /* We have no udelay by now */ |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 34 | GPTPR = 0; /* 32Khz */ |
Guennadi Liakhovetski | 4771a4c | 2008-09-25 20:54:37 +0200 | [diff] [blame] | 35 | /* Freerun Mode, PERCLK1 input */ |
| 36 | GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; |
Sascha Hauer | 1a7676f | 2008-03-26 20:40:42 +0100 | [diff] [blame] | 37 | |
| 38 | return 0; |
| 39 | } |
| 40 | |
Andrew Ruder | 4124920 | 2014-08-12 09:26:00 -0500 | [diff] [blame] | 41 | unsigned long timer_read_counter(void) |
Stefano Babic | ecb6e6e | 2012-02-04 13:02:01 +0100 | [diff] [blame] | 42 | { |
Andrew Ruder | 4124920 | 2014-08-12 09:26:00 -0500 | [diff] [blame] | 43 | return GPTCNT; |
Stefano Babic | ecb6e6e | 2012-02-04 13:02:01 +0100 | [diff] [blame] | 44 | } |