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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roese88fbf932010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glasse98e01e2014-09-04 16:27:32 -06007#include <common.h>
Simon Glass79a9da32014-09-04 16:27:34 -06008#include <dm.h>
9#include <errno.h>
10#include <fdtdec.h>
Joe Hershberger65b905b2015-03-22 17:08:59 -050011#include <mapmem.h>
wdenke85390d2002-04-01 14:29:03 +000012#include <ns16550.h>
Simon Glass79a9da32014-09-04 16:27:34 -060013#include <serial.h>
Ladislav Michlcc294422010-02-01 23:34:25 +010014#include <watchdog.h>
Graeme Russ14f06e62010-04-24 00:05:46 +100015#include <linux/types.h>
16#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000017
Simon Glass79a9da32014-09-04 16:27:34 -060018DECLARE_GLOBAL_DATA_PTR;
19
Detlev Zundel166fb542009-04-03 11:53:01 +020020#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
21#define UART_MCRVAL (UART_MCR_DTR | \
22 UART_MCR_RTS) /* RTS/DTR */
23#define UART_FCRVAL (UART_FCR_FIFO_EN | \
24 UART_FCR_RXSR | \
25 UART_FCR_TXSR) /* Clear & enable FIFOs */
Simon Glass79a9da32014-09-04 16:27:34 -060026
27#ifndef CONFIG_DM_SERIAL
Graeme Russ14f06e62010-04-24 00:05:46 +100028#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassdd5497c2011-10-15 19:14:09 +000029#define serial_out(x, y) outb(x, (ulong)y)
30#define serial_in(y) inb((ulong)y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +000031#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassdd5497c2011-10-15 19:14:09 +000032#define serial_out(x, y) out_be32(y, x)
33#define serial_in(y) in_be32(y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +000034#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassdd5497c2011-10-15 19:14:09 +000035#define serial_out(x, y) out_le32(y, x)
36#define serial_in(y) in_le32(y)
Graeme Russ14f06e62010-04-24 00:05:46 +100037#else
Simon Glassdd5497c2011-10-15 19:14:09 +000038#define serial_out(x, y) writeb(x, y)
39#define serial_in(y) readb(y)
Graeme Russ14f06e62010-04-24 00:05:46 +100040#endif
Simon Glass79a9da32014-09-04 16:27:34 -060041#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000042
Khoronzhuk, Ivan80902982014-07-16 00:59:25 +030043#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -040044#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
45#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharancbc08882014-04-09 15:38:46 -040046#undef UART_MCRVAL
47#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
48#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
49#else
50#define UART_MCRVAL (UART_MCR_RTS)
51#endif
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -040052#endif
53
Prafulla Wadaskar66216372010-10-27 21:58:31 +053054#ifndef CONFIG_SYS_NS16550_IER
55#define CONFIG_SYS_NS16550_IER 0x00
56#endif /* CONFIG_SYS_NS16550_IER */
57
Simon Glass79a9da32014-09-04 16:27:34 -060058#ifdef CONFIG_DM_SERIAL
Simon Glass79a9da32014-09-04 16:27:34 -060059
Simon Glass6aba4fd2015-01-26 18:27:08 -070060static inline void serial_out_shift(unsigned char *addr, int shift, int value)
61{
Simon Glass79a9da32014-09-04 16:27:34 -060062#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass96e230b2014-10-10 07:49:13 -060063 outb(value, (ulong)addr);
Simon Glass79a9da32014-09-04 16:27:34 -060064#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
65 out_le32(addr, value);
66#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
67 out_be32(addr, value);
68#elif defined(CONFIG_SYS_BIG_ENDIAN)
Simon Glass6aba4fd2015-01-26 18:27:08 -070069 writeb(value, addr + (1 << shift) - 1);
Simon Glass79a9da32014-09-04 16:27:34 -060070#else
71 writeb(value, addr);
72#endif
73}
74
Simon Glass6aba4fd2015-01-26 18:27:08 -070075static inline int serial_in_shift(unsigned char *addr, int shift)
Simon Glass79a9da32014-09-04 16:27:34 -060076{
Simon Glass79a9da32014-09-04 16:27:34 -060077#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass96e230b2014-10-10 07:49:13 -060078 return inb((ulong)addr);
Simon Glass79a9da32014-09-04 16:27:34 -060079#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
80 return in_le32(addr);
81#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
82 return in_be32(addr);
83#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Linb5c372d2015-02-28 15:55:36 +080084 return readb(addr + (1 << shift) - 1);
Simon Glass79a9da32014-09-04 16:27:34 -060085#else
86 return readb(addr);
87#endif
88}
89
Simon Glass6aba4fd2015-01-26 18:27:08 -070090static void ns16550_writeb(NS16550_t port, int offset, int value)
91{
92 struct ns16550_platdata *plat = port->plat;
93 unsigned char *addr;
94
95 offset *= 1 << plat->reg_shift;
96 addr = map_sysmem(plat->base, 0) + offset;
97 /*
98 * As far as we know it doesn't make sense to support selection of
99 * these options at run-time, so use the existing CONFIG options.
100 */
101 serial_out_shift(addr, plat->reg_shift, value);
102}
103
104static int ns16550_readb(NS16550_t port, int offset)
105{
106 struct ns16550_platdata *plat = port->plat;
107 unsigned char *addr;
108
109 offset *= 1 << plat->reg_shift;
110 addr = map_sysmem(plat->base, 0) + offset;
111
112 return serial_in_shift(addr, plat->reg_shift);
113}
114
Simon Glass79a9da32014-09-04 16:27:34 -0600115/* We can clean these up once everything is moved to driver model */
116#define serial_out(value, addr) \
117 ns16550_writeb(com_port, addr - (unsigned char *)com_port, value)
118#define serial_in(addr) \
119 ns16550_readb(com_port, addr - (unsigned char *)com_port)
120#endif
121
Simon Glass27afb522015-01-26 18:27:09 -0700122static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
Simon Glasse98e01e2014-09-04 16:27:32 -0600123{
124 const unsigned int mode_x_div = 16;
125
Simon Glass27afb522015-01-26 18:27:09 -0700126 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
127}
128
129int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
130{
Simon Glasse98e01e2014-09-04 16:27:32 -0600131#ifdef CONFIG_OMAP1510
132 /* If can't cleanly clock 115200 set div to 1 */
133 if ((clock == 12000000) && (baudrate == 115200)) {
134 port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
135 return 1; /* return 1 for base divisor */
136 }
137 port->osc_12m_sel = 0; /* clear if previsouly set */
138#endif
139
Simon Glass27afb522015-01-26 18:27:09 -0700140 return calc_divisor(port, clock, baudrate);
Simon Glasse98e01e2014-09-04 16:27:32 -0600141}
142
Simon Glassc31ebfe2014-09-04 16:27:33 -0600143static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
144{
145 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
146 serial_out(baud_divisor & 0xff, &com_port->dll);
147 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
148 serial_out(UART_LCRVAL, &com_port->lcr);
149}
150
Simon Glassdd5497c2011-10-15 19:14:09 +0000151void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000152{
Gregoire Gentil6b05d0a2014-11-10 11:04:10 -0800153#if (defined(CONFIG_SPL_BUILD) && \
154 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000155 /*
Gregoire Gentil6b05d0a2014-11-10 11:04:10 -0800156 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
157 * before SPL starts only THRE bit is set. We have to empty the
158 * transmitter before initialization starts.
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000159 */
160 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
161 == UART_LSR_THRE) {
Simon Glass79a9da32014-09-04 16:27:34 -0600162 if (baud_divisor != -1)
163 NS16550_setbrg(com_port, baud_divisor);
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000164 serial_out(0, &com_port->mdr1);
165 }
166#endif
167
Scott Wood6c6f0612012-09-18 18:19:05 -0500168 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
169 ;
170
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530171 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Tom Rinifc695e32013-12-20 11:19:33 -0500172#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
173 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Graeme Russ14f06e62010-04-24 00:05:46 +1000174 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk21136db2003-07-16 21:53:01 +0000175#endif
Simon Glassc31ebfe2014-09-04 16:27:33 -0600176 NS16550_setbrg(com_port, 0);
Graeme Russ14f06e62010-04-24 00:05:46 +1000177 serial_out(UART_MCRVAL, &com_port->mcr);
178 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass79a9da32014-09-04 16:27:34 -0600179 if (baud_divisor != -1)
180 NS16550_setbrg(com_port, baud_divisor);
Masahiro Yamada641e3ce2014-07-30 19:11:41 +0900181#if defined(CONFIG_OMAP) || \
Matt Porter7967b1a2013-03-15 10:07:09 +0000182 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
TENART Antoinea6be77c2013-07-02 12:05:58 +0200183 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Chandan Nath7d744102011-10-14 02:58:26 +0000184
Simon Glassdd5497c2011-10-15 19:14:09 +0000185 /* /16 is proper to hit 115200 with 48MHz */
186 serial_out(0, &com_port->mdr1);
Mike Frysingerd0e97862009-02-11 20:26:52 -0500187#endif /* CONFIG_OMAP */
Khoronzhuk, Ivan80902982014-07-16 00:59:25 +0300188#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -0400189 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
190#endif
wdenke85390d2002-04-01 14:29:03 +0000191}
192
Ron Madriddfa028a2009-02-18 14:30:44 -0800193#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassdd5497c2011-10-15 19:14:09 +0000194void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000195{
Prafulla Wadaskar66216372010-10-27 21:58:31 +0530196 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Simon Glassc31ebfe2014-09-04 16:27:33 -0600197 NS16550_setbrg(com_port, 0);
Graeme Russ14f06e62010-04-24 00:05:46 +1000198 serial_out(UART_MCRVAL, &com_port->mcr);
199 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glassc31ebfe2014-09-04 16:27:33 -0600200 NS16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000201}
Ron Madriddfa028a2009-02-18 14:30:44 -0800202#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000203
Simon Glassdd5497c2011-10-15 19:14:09 +0000204void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000205{
Simon Glassdd5497c2011-10-15 19:14:09 +0000206 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
207 ;
Graeme Russ14f06e62010-04-24 00:05:46 +1000208 serial_out(c, &com_port->thr);
Stefan Roese57b99882010-10-12 09:39:45 +0200209
210 /*
211 * Call watchdog_reset() upon newline. This is done here in putc
212 * since the environment code uses a single puts() to print the complete
213 * environment upon "printenv". So we can't put this watchdog call
214 * in puts().
215 */
216 if (c == '\n')
217 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000218}
219
Ron Madriddfa028a2009-02-18 14:30:44 -0800220#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassdd5497c2011-10-15 19:14:09 +0000221char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000222{
Graeme Russ14f06e62010-04-24 00:05:46 +1000223 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasut9e1fca92012-09-15 10:25:19 +0200224#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk29e7f5a2004-03-12 00:14:09 +0000225 extern void usbtty_poll(void);
226 usbtty_poll();
227#endif
Ladislav Michlcc294422010-02-01 23:34:25 +0100228 WATCHDOG_RESET();
wdenk29e7f5a2004-03-12 00:14:09 +0000229 }
Graeme Russ14f06e62010-04-24 00:05:46 +1000230 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000231}
232
Simon Glassdd5497c2011-10-15 19:14:09 +0000233int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000234{
Simon Glassdd5497c2011-10-15 19:14:09 +0000235 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000236}
237
Ron Madriddfa028a2009-02-18 14:30:44 -0800238#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
Simon Glass79a9da32014-09-04 16:27:34 -0600239
Simon Glass27afb522015-01-26 18:27:09 -0700240#ifdef CONFIG_DEBUG_UART_NS16550
241
242#include <debug_uart.h>
243
244void debug_uart_init(void)
245{
246 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
247 int baud_divisor;
248
249 /*
250 * We copy the code from above because it is already horribly messy.
251 * Trying to refactor to nicely remove the duplication doesn't seem
252 * feasible. The better fix is to move all users of this driver to
253 * driver model.
254 */
255 baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
256 CONFIG_BAUDRATE);
257
258 serial_out_shift(&com_port->ier, 0, CONFIG_SYS_NS16550_IER);
259 serial_out_shift(&com_port->mcr, 0, UART_MCRVAL);
260 serial_out_shift(&com_port->fcr, 0, UART_FCRVAL);
261
262 serial_out_shift(&com_port->lcr, 0, UART_LCR_BKSE | UART_LCRVAL);
263 serial_out_shift(&com_port->dll, 0, baud_divisor & 0xff);
264 serial_out_shift(&com_port->dlm, 0, (baud_divisor >> 8) & 0xff);
265 serial_out_shift(&com_port->lcr, 0, UART_LCRVAL);
266}
267
268static inline void _debug_uart_putc(int ch)
269{
270 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
271
272 while (!(serial_in_shift(&com_port->lsr, 0) & UART_LSR_THRE))
273 ;
274 serial_out_shift(&com_port->thr, 0, ch);
275}
276
277DEBUG_UART_FUNCS
278
279#endif
280
Simon Glass79a9da32014-09-04 16:27:34 -0600281#ifdef CONFIG_DM_SERIAL
282static int ns16550_serial_putc(struct udevice *dev, const char ch)
283{
284 struct NS16550 *const com_port = dev_get_priv(dev);
285
286 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
287 return -EAGAIN;
288 serial_out(ch, &com_port->thr);
289
290 /*
291 * Call watchdog_reset() upon newline. This is done here in putc
292 * since the environment code uses a single puts() to print the complete
293 * environment upon "printenv". So we can't put this watchdog call
294 * in puts().
295 */
296 if (ch == '\n')
297 WATCHDOG_RESET();
298
299 return 0;
300}
301
302static int ns16550_serial_pending(struct udevice *dev, bool input)
303{
304 struct NS16550 *const com_port = dev_get_priv(dev);
305
306 if (input)
307 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
308 else
309 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
310}
311
312static int ns16550_serial_getc(struct udevice *dev)
313{
314 struct NS16550 *const com_port = dev_get_priv(dev);
315
Simon Glassddb958c2014-10-22 21:37:03 -0600316 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass79a9da32014-09-04 16:27:34 -0600317 return -EAGAIN;
318
319 return serial_in(&com_port->rbr);
320}
321
322static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
323{
324 struct NS16550 *const com_port = dev_get_priv(dev);
325 struct ns16550_platdata *plat = com_port->plat;
326 int clock_divisor;
327
328 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
329
330 NS16550_setbrg(com_port, clock_divisor);
331
332 return 0;
333}
334
335int ns16550_serial_probe(struct udevice *dev)
336{
337 struct NS16550 *const com_port = dev_get_priv(dev);
338
Simon Glass3bf04f32014-10-22 21:37:05 -0600339 com_port->plat = dev_get_platdata(dev);
Simon Glass79a9da32014-09-04 16:27:34 -0600340 NS16550_init(com_port, -1);
341
342 return 0;
343}
344
Simon Glass3bf04f32014-10-22 21:37:05 -0600345#ifdef CONFIG_OF_CONTROL
Simon Glass79a9da32014-09-04 16:27:34 -0600346int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
347{
Simon Glass79a9da32014-09-04 16:27:34 -0600348 struct ns16550_platdata *plat = dev->platdata;
349 fdt_addr_t addr;
350
Bin Meng0203c1c2014-12-31 16:05:12 +0800351 /* try Processor Local Bus device first */
Simon Glass79a9da32014-09-04 16:27:34 -0600352 addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
Bin Meng0203c1c2014-12-31 16:05:12 +0800353#ifdef CONFIG_PCI
354 if (addr == FDT_ADDR_T_NONE) {
355 /* then try pci device */
356 struct fdt_pci_addr pci_addr;
357 u32 bar;
358 int ret;
359
360 /* we prefer to use a memory-mapped register */
361 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
362 FDT_PCI_SPACE_MEM32, "reg",
363 &pci_addr);
364 if (ret) {
365 /* try if there is any i/o-mapped register */
366 ret = fdtdec_get_pci_addr(gd->fdt_blob,
367 dev->of_offset,
368 FDT_PCI_SPACE_IO,
369 "reg", &pci_addr);
370 if (ret)
371 return ret;
372 }
373
374 ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
375 &pci_addr, &bar);
376 if (ret)
377 return ret;
378
379 addr = bar;
380 }
381#endif
382
Simon Glass79a9da32014-09-04 16:27:34 -0600383 if (addr == FDT_ADDR_T_NONE)
384 return -EINVAL;
385
Simon Glass25463942014-10-22 21:37:04 -0600386 plat->base = addr;
Simon Glass79a9da32014-09-04 16:27:34 -0600387 plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
388 "reg-shift", 1);
Simon Glass79a9da32014-09-04 16:27:34 -0600389
390 return 0;
391}
Simon Glass3bf04f32014-10-22 21:37:05 -0600392#endif
Simon Glass79a9da32014-09-04 16:27:34 -0600393
394const struct dm_serial_ops ns16550_serial_ops = {
395 .putc = ns16550_serial_putc,
396 .pending = ns16550_serial_pending,
397 .getc = ns16550_serial_getc,
398 .setbrg = ns16550_serial_setbrg,
399};
400#endif /* CONFIG_DM_SERIAL */